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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Abel Vesa <abel.vesa@linaro.org>,
	Wenbin Yao <wenbin.yao@oss.qualcomm.com>
Cc: "Vinod Koul" <vkoul@kernel.org>,
	"Kishon Vijay Abraham I" <kishon@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Bjorn Andersson" <andersson@kernel.org>,
	linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pci@vger.kernel.org, konrad.dybcio@oss.qualcomm.com,
	qiang.yu@oss.qualcomm.com,
	"Prudhvi Yarlagadda" <quic_pyarlaga@quicinc.com>
Subject: Re: [PATCH v4 2/4] dt-bindings: PCI: qcom: Document the Glymur PCIe Controller
Date: Sun, 12 Oct 2025 05:01:45 +0200	[thread overview]
Message-ID: <7dadc4bb-43a1-4d53-bd6a-68ff76f06555@kernel.org> (raw)
In-Reply-To: <w2r4yh2mgdjytteawyyh6h3kyxy36bnbfbfw4wir7jju7grldx@rypy6qjjy3a3>

On 11/10/2025 14:15, Abel Vesa wrote:
>>  
>>  properties:
>>    compatible:
>> -    const: qcom,pcie-x1e80100
>> +    oneOf:
>> +      - const: qcom,pcie-x1e80100
>> +      - items:
>> +          - enum:
>> +              - qcom,glymur-pcie
>> +          - const: qcom,pcie-x1e80100
>>  
> 
> The cnoc_sf_axi clock is not found on Glymur, at least according to this:
> 
> https://lore.kernel.org/all/20250925-v3_glymur_introduction-v1-19-24b601bbecc0@oss.qualcomm.com/
> 
> And dtbs_check reports the following:
> 
> arch/arm64/boot/dts/qcom/glymur-crd.dtb: pci@1b40000 (qcom,glymur-pcie): clock-names: ['aux', 'cfg', 'bus_master', 'bus_slave', 'slave_q2a', 'noc_aggr'] is too short
>         from schema $id: http://devicetree.org/schemas/pci/qcom,pcie-x1e80100.yaml#
> 
> One more thing:
> 
> arch/arm64/boot/dts/qcom/glymur-crd.dtb: pci@1b40000 (qcom,glymur-pcie): max-link-speed: 5 is not one of [1, 2, 3, 4]
>         from schema $id: http://devicetree.org/schemas/pci/qcom,pcie-x1e80100.yaml#
> 

So that's another Glymur patch which wasn't ever tested?

Best regards,
Krzysztof

  reply	other threads:[~2025-10-12  3:01 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-04  6:22 [PATCH v4 0/4] PCI: qcom: Add support for Glymur PCIe Gen5x4 Wenbin Yao
2025-09-04  6:22 ` [PATCH v4 1/4] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the Glymur QMP PCIe PHY Wenbin Yao
2025-09-04  6:22 ` [PATCH v4 2/4] dt-bindings: PCI: qcom: Document the Glymur PCIe Controller Wenbin Yao
2025-10-11 12:15   ` Abel Vesa
2025-10-12  3:01     ` Krzysztof Kozlowski [this message]
2025-10-15  1:50       ` Qiang Yu
2025-10-15  6:58         ` Abel Vesa
2025-10-16  7:23           ` Qiang Yu
2025-10-15  1:42     ` Qiang Yu
2025-09-04  6:22 ` [PATCH v4 3/4] phy: qcom-qmp: pcs: Add v8.50 register offsets Wenbin Yao
2025-09-04  6:22 ` [PATCH v4 4/4] phy: qcom: qmp-pcie: Add support for Glymur PCIe Gen5x4 PHY Wenbin Yao
2025-09-09  6:10 ` [PATCH v4 0/4] PCI: qcom: Add support for Glymur PCIe Gen5x4 Wenbin Yao (Consultant)

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