From: Krzysztof Kozlowski <krzk@kernel.org>
To: Ivan Vecera <ivecera@redhat.com>, netdev@vger.kernel.org
Cc: Michal Schmidt <mschmidt@redhat.com>,
Vadim Fedorenko <vadim.fedorenko@linux.dev>,
Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
Jiri Pirko <jiri@resnulli.us>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Prathosh Satish <Prathosh.Satish@microchip.com>,
Lee Jones <lee@kernel.org>, Kees Cook <kees@kernel.org>,
Andy Shevchenko <andy@kernel.org>,
Andrew Morton <akpm@linux-foundation.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-hardening@vger.kernel.org
Subject: Re: [PATCH 16/28] dt-bindings: dpll: Add support for Microchip Azurite chip family
Date: Mon, 7 Apr 2025 20:04:26 +0200 [thread overview]
Message-ID: <7dfede37-2434-4892-8c8d-4d005fa1072b@kernel.org> (raw)
In-Reply-To: <20250407173149.1010216-7-ivecera@redhat.com>
On 07/04/2025 19:31, Ivan Vecera wrote:
> This adds DT bindings schema for Microchip Azurite DPLL chip family.
Please do not use "This commit/patch/change", but imperative mood. See
longer explanation here:
https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95
> These bindings are used by zl3073x driver and specifies this device
> that can be connected either to I2C or SPI bus.
Bindings are for hardware, not driver. Explain the hardware.
>
> The schema inherits existing dpll-device and dpll-pin schemas.
>
Do not explain what schema does - we see it. Explain the hardware which
we do not see here, because we (or to be precise: I) know nothing about.
> Reviewed-by: Michal Schmidt <mschmidt@redhat.com>
> Signed-off-by: Ivan Vecera <ivecera@redhat.com>
> ---
> .../bindings/dpll/microchip,zl3073x.yaml | 74 +++++++++++++++++++
> MAINTAINERS | 1 +
> 2 files changed, 75 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dpll/microchip,zl3073x.yaml
>
> diff --git a/Documentation/devicetree/bindings/dpll/microchip,zl3073x.yaml b/Documentation/devicetree/bindings/dpll/microchip,zl3073x.yaml
> new file mode 100644
> index 0000000000000..38a6cc00bc026
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dpll/microchip,zl3073x.yaml
> @@ -0,0 +1,74 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dpll/microchip,zl3073x.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip Azurite DPLL device
> +
> +maintainers:
> + - Ivan Vecera <ivecera@redhat.com>
> +
> +properties:
> + compatible:
> + enum:
> + - microchip,zl3073x-i2c
> + - microchip,zl3073x-spi
1. No, you do not get two compatibles. Only one.
2. What is 'x'? Wildcard? If so, drop and use specific compatibles.
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> +
> +allOf:
> + - $ref: /schemas/dpll/dpll-device.yaml
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + i2c {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + dpll@70 {
> + compatible = "microchip,zl3073x-i2c";
> + #address-cells = <0>;
> + #size-cells = <0>;
Again, why do you need them if you are not using these two?
> + reg = <0x70>;
> + status = "okay";
Drop
Also, follow DTS coding style and order properties properly.
> +
> + num-dplls = <2>;
> + dpll-types = "pps", "eec";
> +
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-04-07 18:04 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-07 17:28 [PATCH 00/28] Add Microchip ZL3073x support Ivan Vecera
2025-04-07 17:28 ` [PATCH 01/28] mfd: " Ivan Vecera
2025-04-07 17:53 ` Krzysztof Kozlowski
2025-04-09 6:31 ` Ivan Vecera
2025-04-07 18:05 ` Andy Shevchenko
2025-04-09 6:40 ` Ivan Vecera
2025-04-14 6:36 ` Andy Shevchenko
2025-04-14 11:39 ` Ivan Vecera
2025-04-14 11:52 ` Ivan Vecera
2025-04-14 13:55 ` Andy Shevchenko
2025-04-14 14:08 ` Ivan Vecera
2025-04-14 14:07 ` Ivan Vecera
2025-04-14 14:10 ` Andy Shevchenko
2025-04-14 14:13 ` Andy Shevchenko
2025-04-14 14:16 ` Andy Shevchenko
2025-04-14 14:53 ` Ivan Vecera
2025-04-14 17:09 ` Andy Shevchenko
2025-04-14 17:42 ` Ivan Vecera
2025-04-14 13:58 ` Andy Shevchenko
2025-04-07 17:28 ` [PATCH 02/28] mfd: zl3073x: Register itself as devlink device Ivan Vecera
2025-04-07 20:57 ` Andrew Lunn
2025-04-09 6:41 ` Ivan Vecera
2025-04-07 17:28 ` [PATCH 03/28] mfd: zl3073x: Add register access helpers Ivan Vecera
2025-04-07 21:03 ` Andrew Lunn
2025-04-09 6:42 ` Ivan Vecera
2025-04-07 17:28 ` [PATCH 04/28] mfd: zl3073x: Add macros for device registers access Ivan Vecera
2025-04-07 17:28 ` [PATCH 05/28] mfd: zl3073x: Add components versions register defs Ivan Vecera
2025-04-07 21:09 ` Andrew Lunn
2025-04-09 6:44 ` Ivan Vecera
2025-04-10 7:11 ` Krzysztof Kozlowski
2025-04-10 10:23 ` Ivan Vecera
2025-04-10 10:42 ` Krzysztof Kozlowski
2025-04-10 12:01 ` Ivan Vecera
2025-04-07 17:28 ` [PATCH 06/28] mfd: zl3073x: Implement devlink device info Ivan Vecera
2025-04-07 17:28 ` [PATCH 07/28] mfd: zl3073x: Add macro to wait for register value bits to be cleared Ivan Vecera
2025-04-07 17:28 ` [PATCH 08/28] mfd: zl3073x: Add functions to work with register mailboxes Ivan Vecera
2025-04-07 17:28 ` [PATCH 09/28] mfd: zl3073x: Add clock_id field Ivan Vecera
2025-04-07 17:31 ` [PATCH 10/28] lib: Allow modules to use strnchrnul Ivan Vecera
2025-04-07 17:50 ` Kees Cook
2025-04-07 17:31 ` [PATCH 11/28] mfd: zl3073x: Load mfg file into HW if it is present Ivan Vecera
2025-04-07 17:31 ` [PATCH 12/28] mfd: zl3073x: Fetch invariants during probe Ivan Vecera
2025-04-07 17:31 ` [PATCH 13/28] dpll: Add Microchip ZL3073x DPLL driver Ivan Vecera
2025-04-07 17:31 ` [PATCH 14/28] mfd: zl3073x: Register DPLL sub-device during init Ivan Vecera
2025-04-07 17:31 ` [PATCH 15/28] dt-bindings: dpll: Add device tree bindings for DPLL device and pin Ivan Vecera
2025-04-07 18:01 ` Krzysztof Kozlowski
2025-04-07 18:10 ` Krzysztof Kozlowski
2025-04-08 5:19 ` Michal Schmidt
2025-04-09 7:09 ` Ivan Vecera
2025-04-07 17:31 ` [PATCH 16/28] dt-bindings: dpll: Add support for Microchip Azurite chip family Ivan Vecera
2025-04-07 18:04 ` Krzysztof Kozlowski [this message]
2025-04-09 7:19 ` Ivan Vecera
2025-04-10 7:01 ` Krzysztof Kozlowski
2025-04-10 10:28 ` Ivan Vecera
2025-04-10 12:19 ` Krzysztof Kozlowski
2025-04-10 12:38 ` Ivan Vecera
2025-04-07 17:31 ` [PATCH 17/28] dpll: zl3073x: Read DPLL types from firmware Ivan Vecera
2025-04-07 17:31 ` [PATCH 18/28] dpll: zl3073x: Read optional pin properties " Ivan Vecera
2025-04-07 18:06 ` Krzysztof Kozlowski
2025-04-09 7:22 ` Ivan Vecera
2025-04-07 17:31 ` [PATCH 19/28] dpll: zl3073x: Implement input pin selection in manual mode Ivan Vecera
2025-04-07 17:32 ` [PATCH 20/28] dpll: zl3073x: Add support to get/set priority on input pins Ivan Vecera
2025-04-07 17:32 ` [PATCH 21/28] dpll: zl3073x: Implement input pin state setting in automatic mode Ivan Vecera
2025-04-07 17:32 ` [PATCH 22/28] dpll: zl3073x: Add support to get/set frequency on input pins Ivan Vecera
2025-04-07 17:32 ` [PATCH 23/28] dpll: zl3073x: Add support to get/set frequency on output pins Ivan Vecera
2025-04-07 17:32 ` [PATCH 24/28] dpll: zl3073x: Read pin supported frequencies from firmware Ivan Vecera
2025-04-07 17:32 ` [PATCH 25/28] dpll: zl3073x: Add support to get phase offset on input pins Ivan Vecera
2025-04-07 17:32 ` [PATCH 26/28] dpll: zl3073x: Add support to get/set phase adjust on pins Ivan Vecera
2025-04-07 17:33 ` [PATCH 27/28] dpll: zl3073x: Add support to get/set esync " Ivan Vecera
2025-04-07 17:33 ` [PATCH 28/28] dpll: zl3073x: Add support to get fractional frequency offset on input pins Ivan Vecera
2025-04-07 18:06 ` [PATCH 00/28] Add Microchip ZL3073x support Andy Shevchenko
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