Re: [PATCH V9 1/3] perf/x86/intel: Avoid pmu_disable/enable if !cpuc->enabled in sample read

Peter Zijlstra
2025-01-16T10:51:21Z

On Thu, Jan 16, 2025 at 11:32:56AM +0100, Peter Zijlstra wrote:

> diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
> index ba74e1198328..050098c54ae7 100644
> --- a/arch/x86/events/intel/ds.c
> +++ b/arch/x86/events/intel/ds.c
> @@ -953,7 +953,7 @@ int intel_pmu_drain_bts_buffer(void)
> return 1;
> }
>
> -static inline void intel_pmu_drain_pebs_buffer(void)
> +void intel_pmu_drain_pebs_buffer(void)
> {
> struct perf_sample_data data;
>

Also, while poking there, I noticed we never did the below :/

---
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 5b491a6815e6..20a2556de645 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -3081,7 +3081,7 @@ static int handle_pmi_common(struct pt_regs *regs, u64 status)

handled++;
x86_pmu_handle_guest_pebs(regs, &data);
- x86_pmu.drain_pebs(regs, &data);
+ static_call(x86_pmu_drain_pebs)(regs, &data);
status &= intel_ctrl | GLOBAL_STATUS_TRACE_TOPAPMI;

/*
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index 050098c54ae7..75e5e6678282 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -956,8 +956,7 @@ int intel_pmu_drain_bts_buffer(void)
void intel_pmu_drain_pebs_buffer(void)
{
struct perf_sample_data data;
-
- x86_pmu.drain_pebs(NULL, &data);
+ static_call(x86_pmu_drain_pebs)(NULL, &data);
}

/*
diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index 38b3e30f8988..fb635e2b9909 100644
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -1107,6 +1107,7 @@ extern struct x86_pmu x86_pmu __read_mostly;

DECLARE_STATIC_CALL(x86_pmu_set_period, *x86_pmu.set_period);
DECLARE_STATIC_CALL(x86_pmu_update, *x86_pmu.update);
+DECLARE_STATIC_CALL(x86_pmu_drain_pebs, *x86_pmu.drain_pebs);

static __always_inline struct x86_perf_task_context_opt *task_context_opt(void *ctx)
{