From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-187.mta1.migadu.com (out-187.mta1.migadu.com [95.215.58.187]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2F92D25291B for ; Mon, 17 Nov 2025 15:36:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.187 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763393768; cv=none; b=mRQ0az6vElsJ9uPWXTTSYUuSIctQHtxTHe/CVIY/b18ThdiNByV6N4Al9QpHRJVjrJgc1KOw1x3i6s4yB8FR7jnGeDDOQTQQmLYhfkIFzWrqg9eiSNkW56Jt6Gy04Zkn71rPoGAfEQnxoxtOoa/F5xKgKxnMgcYSQtlF/VSIBzw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763393768; c=relaxed/simple; bh=CxFW7BmvaGXeJq1l4Yy8MxMQG0BWZ/1ue2fQrAEw1mg=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=reW5tmFneA728e/fNVYIAnd9C943xRtqMMgKEnvCSFg3XkxEz+b7sx/g2CIk3ERewGDFEwZ+04ahLRNKoeii8ZD6LOXfT/HpMnjA/if9Kol2DdbktZnqwPj4QYIvgEUVeNhyMJbNuJrC3PZIgdHCnjZOTFxWmct8Rhr7jojc5GE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=AahLqUFK; arc=none smtp.client-ip=95.215.58.187 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="AahLqUFK" Message-ID: <7f7423e9-809d-4023-be01-db59e6dd755e@linux.dev> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1763393762; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=mU/3PG+HZ54Dv6Ba1AtcGG0kjiOCqkkHh5iNapwa58E=; b=AahLqUFKm1doHZ7y+dmO8+5ffEQ2SbL1xfN7iM8enuoWJu1mWSpZBEaFbz9AMGXaHvHQ+M aNH7U0B88KtGJbUjESaYZSePKkGLIjC73UhO1PAOpsNgmcXztgFRrNEDO4g4cXNwv5Fg3+ u/OXIYLgIgODkcJOjnjIHKto4cxW988= Date: Mon, 17 Nov 2025 10:35:57 -0500 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Subject: Re: [PATCH 3/3] drm: zynqmp: Add blend mode property to graphics plane To: "Klymenko, Anatoliy" , Laurent Pinchart , Tomi Valkeinen , "dri-devel@lists.freedesktop.org" Cc: "linux-kernel@vger.kernel.org" , Mike Looijmans , David Airlie , Thomas Zimmermann , Maarten Lankhorst , Maxime Ripard , "linux-arm-kernel@lists.infradead.org" , Simona Vetter , "Simek, Michal" References: <20251113203715.2768107-1-sean.anderson@linux.dev> <20251113203715.2768107-4-sean.anderson@linux.dev> Content-Language: en-US X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Sean Anderson In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Migadu-Flow: FLOW_OUT On 11/14/25 19:12, Klymenko, Anatoliy wrote: > [AMD Official Use Only - AMD Internal Distribution Only] > >> -----Original Message----- >> From: dri-devel On Behalf Of Sean >> Anderson >> Sent: Thursday, November 13, 2025 3:07 PM >> To: Klymenko, Anatoliy ; Laurent Pinchart >> ; Tomi Valkeinen >> ; dri-devel@lists.freedesktop.org >> Cc: linux-kernel@vger.kernel.org; Mike Looijmans ; >> David Airlie ; Thomas Zimmermann >> ; Maarten Lankhorst >> ; Maxime Ripard ; >> linux-arm-kernel@lists.infradead.org; Simona Vetter ; Simek, >> Michal >> Subject: Re: [PATCH 3/3] drm: zynqmp: Add blend mode property to graphics >> plane >> >> Caution: This message originated from an External Source. Use proper caution >> when opening attachments, clicking links, or responding. >> >> >> On 11/13/25 18:03, Klymenko, Anatoliy wrote: >> > [AMD Official Use Only - AMD Internal Distribution Only] >> > >> > Hi Sean, >> > >> > Thank you for the patch. >> > >> >> -----Original Message----- >> >> From: Sean Anderson >> >> Sent: Thursday, November 13, 2025 12:37 PM >> >> To: Laurent Pinchart ; Tomi Valkeinen >> >> ; dri-devel@lists.freedesktop.org >> >> Cc: linux-kernel@vger.kernel.org; Mike Looijmans >> ; >> >> David Airlie ; Thomas Zimmermann >> >> ; Maarten Lankhorst >> >> ; Klymenko, Anatoliy >> >> ; Maxime Ripard ; >> linux- >> >> arm-kernel@lists.infradead.org; Simona Vetter ; Simek, >> >> Michal ; Sean Anderson >> >> >> >> Subject: [PATCH 3/3] drm: zynqmp: Add blend mode property to graphics >> plane >> >> >> >> Caution: This message originated from an External Source. Use proper >> caution >> >> when opening attachments, clicking links, or responding. >> >> >> >> >> >> When global alpha is enabled, per-pixel alpha is ignored. Allow >> >> userspace to explicitly specify whether to use per-pixel alpha by >> >> exposing it through the blend mode property. I'm not sure whether the >> >> per-pixel alpha is pre-multiplied or not [1], but apparently it *must* be >> >> pre-multiplied so I guess we have to advertise it. >> >> >> >> [1] All we get is "The alpha value available with the graphics stream >> >> will define the transparency of the graphics." >> >> >> >> Signed-off-by: Sean Anderson >> >> --- >> >> >> >> drivers/gpu/drm/xlnx/zynqmp_kms.c | 24 ++++++++++++++++++++++-- >> >> 1 file changed, 22 insertions(+), 2 deletions(-) >> >> >> >> diff --git a/drivers/gpu/drm/xlnx/zynqmp_kms.c >> >> b/drivers/gpu/drm/xlnx/zynqmp_kms.c >> >> index 456ada9ac003..fa1cfc16db36 100644 >> >> --- a/drivers/gpu/drm/xlnx/zynqmp_kms.c >> >> +++ b/drivers/gpu/drm/xlnx/zynqmp_kms.c >> >> @@ -61,6 +61,13 @@ static int zynqmp_dpsub_plane_atomic_check(struct >> >> drm_plane *plane, >> >> if (!new_plane_state->crtc) >> >> return 0; >> >> >> >> + if (new_plane_state->pixel_blend_mode != >> >> DRM_MODE_BLEND_PIXEL_NONE && >> >> + new_plane_state->alpha >> 8 != 0xff) { >> >> + drm_dbg_kms(plane->dev, >> >> + "Plane alpha must be 1.0 when using pixel alpha\n"); >> >> + return -EINVAL; >> >> + } >> >> + >> >> crtc_state = drm_atomic_get_crtc_state(state, new_plane_state->crtc); >> >> if (IS_ERR(crtc_state)) >> >> return PTR_ERR(crtc_state); >> >> @@ -117,9 +124,13 @@ static void >> >> zynqmp_dpsub_plane_atomic_update(struct drm_plane *plane, >> >> >> >> zynqmp_disp_layer_update(layer, new_state); >> >> >> >> - if (plane->index == ZYNQMP_DPSUB_LAYER_GFX) >> >> - zynqmp_disp_blend_set_global_alpha(dpsub->disp, true, >> >> + if (plane->index == ZYNQMP_DPSUB_LAYER_GFX) { >> >> + bool blend = plane->state->pixel_blend_mode == >> >> + DRM_MODE_BLEND_PIXEL_NONE; >> >> + >> >> + zynqmp_disp_blend_set_global_alpha(dpsub->disp, blend, >> >> plane->state->alpha >> 8); >> >> + } >> >> >> >> /* >> >> * Unconditionally enable the layer, as it may have been disabled >> >> @@ -179,9 +190,18 @@ static int zynqmp_dpsub_create_planes(struct >> >> zynqmp_dpsub *dpsub) >> >> return ret; >> >> >> >> if (i == ZYNQMP_DPSUB_LAYER_GFX) { >> >> + unsigned int blend_modes = >> >> + BIT(DRM_MODE_BLEND_PIXEL_NONE) | >> >> + BIT(DRM_MODE_BLEND_PREMULTI); >> > >> > | BIT(DRM_MODE_BLEND_COVERAGE) - this is what implemented in the >> hardware. >> >> Do you have a datasheet (or other) reference? >> > > Yes https://docs.amd.com/v/u/en-US/ug1085-zynq-ultrascale-trm There is no mention of this in the TRM. | Video Blending is defined for two RGB video streams. One of these | streams will be graphics that have an alpha value along with RGB | stream. The alpha value available with the graphics stream will define | the transparency of the graphics. Alpha value defined for blending | function is always 8-bit. 1-bit alpha and 4-bit alpha are also | supported, but these are scaled to 8-bits before they are used for | alpha blending Please quote a specific section where the alpha blending formula is documented. >> But in any case, DRM_MODE_BLEND_PREMULTI is mandatory even if we >> don't support >> it. See drm_plane_create_blend_mode_property for details. >> > > No doubts here OK, so regardless of what the hardware does, we have to pretend to support pre-multiplied alpha. --Sean