From: Stefan Agner <stefan@agner.ch>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: airlied@gmail.com, alison.wang@freescale.com,
dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
airlied@linux.ie, daniel.vetter@ffwll.ch,
jianwei.wang.chn@gmail.com, Shawn Guo <shawnguo@kernel.org>
Subject: Re: [PATCH 7/7] drm/fsl-dcu: use mode flags for hsync/vsync pixelclk polarity
Date: Wed, 03 Feb 2016 15:30:59 -0800 [thread overview]
Message-ID: <7ffa4e731477aeb8066054b4366cfd25@agner.ch> (raw)
In-Reply-To: <20160203140438.GB9650@ulmo>
On 2016-02-03 06:04, Thierry Reding wrote:
> On Wed, Jan 27, 2016 at 06:46:50PM -0800, Stefan Agner wrote:
> [...]
>> On 2015-11-18 18:42, Stefan Agner wrote:
> [...]
>> > diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c
> [...]
>> > @@ -89,6 +91,15 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct
>> > drm_crtc *crtc)
>> > vfp = mode->vsync_start - mode->vdisplay;
>> > vsw = mode->vsync_end - mode->vsync_start;
>> >
>> > + if (!(mode->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE))
>> > + pol |= DCU_SYN_POL_INV_PXCK_FALL;
>> > +
>> > + if (mode->flags & DRM_MODE_FLAG_NHSYNC)
>> > + pol |= DCU_SYN_POL_INV_HS_LOW;
>> > +
>> > + if (mode->flags & DRM_MODE_FLAG_NHSYNC)
>> > + pol |= DCU_SYN_POL_INV_VS_LOW;
>
> I suspect that you want to check for DRM_MODE_FLAG_NVSYNC here instead.
>
Ups, yes.
>> > diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h
>> > b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h
>> > index 6413ac9..2a724f3 100644
>> > --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h
>> > +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h
>> > @@ -47,8 +47,8 @@
>> > #define DCU_VSYN_PARA_FP(x) (x)
>> >
>> > #define DCU_SYN_POL 0x0024
>> > -#define DCU_SYN_POL_INV_PXCK_FALL (0 << 6)
>> > -#define DCU_SYN_POL_NEG_REMAIN (0 << 5)
>> > +#define DCU_SYN_POL_INV_PXCK_FALL BIT(6)
>> > +#define DCU_SYN_POL_NEG_REMAIN BIT(5)
>
> I don't understand these changes. You're in fact changing the values for
> these defines, but it's not mentioned in the commit message. It also
> seems like it should be a separate patch because it isn't related to the
> mode flags changes in the remainder of the patch.
Yes, in order to set them, I need them to be positive, there is no use
if they are zero... They haven't been used at all so far, so there is no
issue in changing their value. Just realized that their naming is
actually related to the 0 value, so I probably should rename them to
just reflect the field name
#define DCU_SYN_POL_INV_PXCK BIT(6)
#define DCU_SYN_POL_NEG BIT(5)
--
Stefan
next prev parent reply other threads:[~2016-02-03 23:33 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-19 2:42 [PATCH 0/7] drm/fsl-dcu: fixes and enhancements Stefan Agner
2015-11-19 2:42 ` [PATCH 1/7] drm/fsl-dcu: specify volatile registers Stefan Agner
2015-11-19 2:42 ` [PATCH 2/7] drm/fsl-dcu: remove regmap return value checks Stefan Agner
2015-11-19 2:42 ` [PATCH 3/7] drm/fsl-dcu: avoid memory leak on errors Stefan Agner
2015-11-19 2:42 ` [PATCH 4/7] drm/fsl-dcu: handle initialization errors properly Stefan Agner
2015-11-19 2:42 ` [PATCH 5/7] drm/fsl-dcu: mask all interrupts on initialization Stefan Agner
2015-11-19 2:42 ` [PATCH 6/7] drm/fsl-dcu: fix alpha blending Stefan Agner
2015-11-19 2:42 ` [PATCH 7/7] drm/fsl-dcu: use mode flags for hsync/vsync pixelclk polarity Stefan Agner
2016-01-28 2:46 ` Stefan Agner
2016-02-03 14:00 ` Thierry Reding
2016-02-03 23:18 ` Stefan Agner
2016-02-04 20:31 ` Stefan Agner
2016-02-03 14:04 ` Thierry Reding
2016-02-03 23:30 ` Stefan Agner [this message]
2016-02-25 23:36 ` [PATCH 0/7] drm/fsl-dcu: fixes and enhancements Stefan Agner
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