From: Kevin Hilman <khilman@kernel.org>
To: Vince Hsu <vinceh@nvidia.com>
Cc: thierry.reding@gmail.com, pdeschrijver@nvidia.com,
swarren@wwwdotorg.org, gnurou@gmail.com, jroedel@suse.de,
p.zabel@pengutronix.de, mturquette@linaro.org,
pgaikwad@nvidia.com, sboyd@codeaurora.org, robh+dt@kernel.org,
pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
linux@arm.linux.org.uk, tbergstrom@nvidia.com, airlied@linux.ie,
bhelgaas@google.com, tj@kernel.org, arnd@arndb.de,
robh@kernel.org, will.deacon@arm.com,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-pm@vger.kernel.org, rjw@rjwysocki.net,
viresh.kumar@linaro.org, Thierry Reding <treding@nvidia.com>
Subject: Re: [PATCH v2 07/17] soc: tegra: pmc: Add generic PM domain support
Date: Mon, 06 Apr 2015 15:37:37 -0700 [thread overview]
Message-ID: <7h1tjwx4r2.fsf@deeprootsystems.com> (raw)
In-Reply-To: <1426162518-7405-8-git-send-email-vinceh@nvidia.com> (Vince Hsu's message of "Thu, 12 Mar 2015 20:15:08 +0800")
Hi Vince,
Vince Hsu <vinceh@nvidia.com> writes:
> From: Thierry Reding <treding@nvidia.com>
>
> The PM domains are populated from DT, and the PM domain consumer devices are
> also bound to their relevant PM domains by DT.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> [vinceh: make changes based on Thierry and Peter's suggestions]
> Signed-off-by: Vince Hsu <vinceh@nvidia.com>
> ---
> v2: revise comment in tegra_powergate_remove_clamping()
> address Alex's comments
Sorry for the late review..., somehow I just noticed this while
reviewing some other PM domain support.
It's nice to see this migrating to PM domains. Some comments below...
[...]
> /**
> * struct tegra_pmc - NVIDIA Tegra PMC
> + * @dev: pointer to parent device
> * @base: pointer to I/O remapped register region
> * @clk: pointer to pclk clock
> + * @soc: SoC-specific data
> * @rate: currently configured rate of pclk
> * @suspend_mode: lowest suspend mode available
> * @cpu_good_time: CPU power good time (in microseconds)
> @@ -126,7 +158,9 @@ struct tegra_pmc_soc {
> * @cpu_pwr_good_en: CPU power good signal is enabled
> * @lp0_vec_phys: physical base address of the LP0 warm boot code
> * @lp0_vec_size: size of the LP0 warm boot code
> + * @powergates: list of power gates
> * @powergates_lock: mutex for power gate register access
> + * @nb: bus notifier for generic power domains
> */
> struct tegra_pmc {
> struct device *dev;
> @@ -150,7 +184,12 @@ struct tegra_pmc {
> u32 lp0_vec_phys;
> u32 lp0_vec_size;
>
> + struct tegra_powergate *powergates;
> struct mutex powergates_lock;
> + struct notifier_block nb;
I don't see these notifiers used anywhere in this series. What is the
intended use here? There have been some other discussions about how to
do this more generically for PM domains[1], so I'd prefer not to see this
in SoC specific PM domains. In this case, it appears unused, so should
be fine to drop (for now.)
[...]
> +static int tegra_pmc_powergate_power_off(struct generic_pm_domain *domain)
> +{
> + struct tegra_powergate *powergate = to_powergate(domain);
> + struct tegra_pmc *pmc = powergate->pmc;
> + int err;
> +
> + dev_dbg(pmc->dev, "> %s(domain=%p)\n", __func__, domain);
> + dev_dbg(pmc->dev, " name: %s\n", domain->name);
> +
> + /* never turn off these partitions */
> + switch (powergate->id) {
> + case TEGRA_POWERGATE_CPU:
> + case TEGRA_POWERGATE_CPU1:
> + case TEGRA_POWERGATE_CPU2:
> + case TEGRA_POWERGATE_CPU3:
> + case TEGRA_POWERGATE_CPU0:
> + case TEGRA_POWERGATE_C0NC:
> + case TEGRA_POWERGATE_IRAM:
> + dev_dbg(pmc->dev, "not disabling always-on partition %s\n",
> + domain->name);
> + err = -EINVAL;
> + goto out;
> + }
You're re-inventing the per-device QoS flag: PM_QOS_FLAG_NO_POWER_OFF
which could be used here to prevent ->power_off from ever being called.
Alternately, if this really a static configuraion, why even register the
->power_off hook for these domains in the first place?
[...]
> +static int tegra_pmc_powergate_init_subdomain(struct tegra_pmc *pmc)
> +{
> + struct tegra_powergate *powergate;
> +
> + list_for_each_entry(powergate, &pmc->powergate_list, head) {
> + struct device_node *pdn;
> + struct tegra_powergate *parent = NULL;
> + struct tegra_powergate *temp;
> + int err;
> +
> + pdn = of_parse_phandle(powergate->of_node, "depend-on", 0);
> + if (!pdn)
> + continue;
I'm not really following the need for the "depend-on" property here.
Looking at the example .dtsi files in this series, it seems to me what
is being described is nested hardware power domains, which genpd already
supports. Any reason you're not using that build-in support?
[...]
> @@ -831,12 +1405,19 @@ static int tegra_pmc_probe(struct platform_device *pdev)
>
> tegra_pmc_init_tsense_reset(pmc);
>
> + if (IS_ENABLED(CONFIG_PM_GENERIC_DOMAINS)) {
> + err = tegra_powergate_init(pmc);
> + if (err < 0)
> + return err;
> + }
On many SoCs there's some special handling for the !CONFIG_PM case here
such that all the PM domains are enabled by default in case they are not
enabled by the bootloader.
> if (IS_ENABLED(CONFIG_DEBUG_FS)) {
> err = tegra_powergate_debugfs_init();
> if (err < 0)
> return err;
> }
>
> + dev_dbg(&pdev->dev, "< %s()\n", __func__);
> return 0;
> }
Kevin
[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2014-November/299345.html
next prev parent reply other threads:[~2015-04-06 22:37 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-12 12:15 [PATCH v2 00/17] Add generic PM domain support for Tegra SoCs Vince Hsu
2015-03-12 12:15 ` [PATCH v2 01/17] reset: add of_reset_control_get_by_index() Vince Hsu
2015-03-12 15:01 ` Philipp Zabel
2015-03-13 3:04 ` Vince Hsu
2015-03-12 12:15 ` [PATCH v2 02/17] memory: tegra: add mc flush support Vince Hsu
2015-03-12 12:15 ` [PATCH v2 03/17] memory: tegra: add flush operation for Tegra30 memory clients Vince Hsu
2015-03-12 12:15 ` [PATCH v2 04/17] memory: tegra: add flush operation for Tegra114 " Vince Hsu
2015-03-12 12:15 ` [PATCH v2 05/17] memory: tegra: add flush operation for Tegra124 " Vince Hsu
2015-03-12 12:15 ` [PATCH v2 06/17] clk: tegra: remove TEGRA_PLL_USE_LOCK for PLLD/PLLD2 Vince Hsu
2015-03-12 12:15 ` [PATCH v2 07/17] soc: tegra: pmc: Add generic PM domain support Vince Hsu
2015-04-06 22:37 ` Kevin Hilman [this message]
2015-04-08 8:06 ` Thierry Reding
2015-03-12 12:15 ` [PATCH v2 08/17] ARM: tegra: add PM domain device nodes to Tegra30 DT Vince Hsu
2015-03-12 12:15 ` [PATCH v2 09/17] ARM: tegra: add PM domain device nodes to Tegra114 DT Vince Hsu
2015-03-12 12:15 ` [PATCH v2 10/17] ARM: tegra: add PM domain device nodes to Tegra124 DT Vince Hsu
2015-03-12 12:15 ` [PATCH v2 11/17] ARM: tegra: add GPU power supply to Jetson TK1 DT Vince Hsu
2015-03-12 12:15 ` [PATCH v2 12/17] drm/tegra: dc: remove the power sequence from driver Vince Hsu
2015-03-12 12:15 ` [PATCH v2 13/17] PCI: tegra: " Vince Hsu
2015-03-12 12:15 ` [PATCH v2 14/17] ata: ahci_tegra: remove " Vince Hsu
2015-03-12 12:19 ` Tejun Heo
2015-03-12 12:23 ` Vince Hsu
2015-03-12 12:33 ` Hans de Goede
2015-03-12 12:15 ` [PATCH v2 15/17] drm/tegra: remove GR3D " Vince Hsu
2015-03-12 12:15 ` [PATCH v2 16/17] ARM: tegra: select PM_GENERIC_DOMAINS Vince Hsu
2015-03-12 12:15 ` [PATCH v2 17/17] soc/tegra: remove lagacy powergate APIs Vince Hsu
2015-03-12 12:45 ` Thierry Reding
2015-03-12 13:11 ` Vince Hsu
2015-03-12 16:18 ` Peter De Schrijver
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=7h1tjwx4r2.fsf@deeprootsystems.com \
--to=khilman@kernel.org \
--cc=airlied@linux.ie \
--cc=arnd@arndb.de \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=galak@codeaurora.org \
--cc=gnurou@gmail.com \
--cc=ijc+devicetree@hellion.org.uk \
--cc=jroedel@suse.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=linux@arm.linux.org.uk \
--cc=mark.rutland@arm.com \
--cc=mturquette@linaro.org \
--cc=p.zabel@pengutronix.de \
--cc=pawel.moll@arm.com \
--cc=pdeschrijver@nvidia.com \
--cc=pgaikwad@nvidia.com \
--cc=rjw@rjwysocki.net \
--cc=robh+dt@kernel.org \
--cc=robh@kernel.org \
--cc=sboyd@codeaurora.org \
--cc=swarren@wwwdotorg.org \
--cc=tbergstrom@nvidia.com \
--cc=thierry.reding@gmail.com \
--cc=tj@kernel.org \
--cc=treding@nvidia.com \
--cc=vinceh@nvidia.com \
--cc=viresh.kumar@linaro.org \
--cc=will.deacon@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox