From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.7 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 698A8C43613 for ; Thu, 20 Jun 2019 03:35:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 33B1820675 for ; Thu, 20 Jun 2019 03:35:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="R24VUbUF" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731316AbfFTDfd (ORCPT ); Wed, 19 Jun 2019 23:35:33 -0400 Received: from mail-pf1-f195.google.com ([209.85.210.195]:36896 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726435AbfFTDfd (ORCPT ); Wed, 19 Jun 2019 23:35:33 -0400 Received: by mail-pf1-f195.google.com with SMTP id 19so836685pfa.4 for ; Wed, 19 Jun 2019 20:35:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:in-reply-to:references:date:message-id :mime-version; bh=HOSCj25pO6a386fSVkhPsk9edlxIx4b0dfihdZfuotE=; b=R24VUbUFz5qZKeynsTUrq4c3dB1nc/QoAc5x5U+zHBRKmgP4irX+Qd/uz+TvIn9Dde 8hzyvekv6Gzm2FKO8q3HSyEgq8Vud578ah6rtzQ3QyhfF5il00SiTGRbeo9J2kI61H8l DMJK9uVuztUlxcdwCN4uQbImQDCa4vCH+p4Ik6/xlqe2I/Xw/gE2bLIDTnJTSR+Y4tqu 8gHa8kqfrF68JmH/Ra/8/AFn7cJw4OyG1GD5rh5Ao3DrXQ12KqDFI/Zb0oyBe3+S23fW A9aA+b8dH+CO2S4ymvs047VKJGaK3Gxqu0jofHWcLZ38fOEqvft10X5TfRunYq1TrEN+ lZKQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:in-reply-to:references:date :message-id:mime-version; bh=HOSCj25pO6a386fSVkhPsk9edlxIx4b0dfihdZfuotE=; b=M2i/c3QMALBlZH/Nr+ewc8Lv+YE4Y73R0dBVoLSCgVlSvk0vLxXZI2pawlTkXtXdXk aiNL6IxhSUSaP2Pd+lHAYhK3G7Ps2IMVS/gJIfs4Nz1s6YHZYzNf0nlE49GO9iU1feW8 z2EKPimnKqaBrkl3peOrQVfy79g8wcZNR01TOcxElF5ez3sh5V0acGqzg7PDgPSr4Eax SKO3qIFfSQu0HQxGgOCv2yJEj7c+QRSBdl3vyd7DB/+Cu5RyMe5twUfCMGs/57N9VKdR Ix1EIESuPXU/9BKDgNHQeOMNkiTl1QduAPHIdOUKtJnc7kuL4FIpFWxQihYaKrhHiP4v CyMA== X-Gm-Message-State: APjAAAVBcACggQfCrUzuzlS7mhseSUu37kT33YfUEQKRv+MqHYJJcm8g J+pLgs0zPhUXSV5h3/HW+Btopw== X-Google-Smtp-Source: APXvYqymLvsH5Jne+eK0EsJ3Q4/Y0qf5ZzWcO17TxweQkCCIYK/LjuDERiWhe89FjMEwwQO+ynf3Mw== X-Received: by 2002:a63:df46:: with SMTP id h6mr10696443pgj.181.1561001732439; Wed, 19 Jun 2019 20:35:32 -0700 (PDT) Received: from localhost ([2601:602:9200:a1a5:ec6a:e4cb:28b2:e322]) by smtp.googlemail.com with ESMTPSA id 133sm23896859pfa.92.2019.06.19.20.35.30 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 Jun 2019 20:35:31 -0700 (PDT) From: Kevin Hilman To: Martin Blumenstingl , linux-amlogic@lists.infradead.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org, linus.walleij@linaro.org, andrew@lunn.ch, robin.murphy@arm.com, narmstrong@baylibre.com, Martin Blumenstingl Subject: Re: [PATCH v3 0/4] Ethernet PHY reset GPIO updates for Amlogic SoCs In-Reply-To: <20190615103832.5126-1-martin.blumenstingl@googlemail.com> References: <20190615103832.5126-1-martin.blumenstingl@googlemail.com> Date: Wed, 19 Jun 2019 20:35:27 -0700 Message-ID: <7hh88lhqtc.fsf@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Martin Blumenstingl writes: > While trying to add the Ethernet PHY interrupt on the X96 Max I found > that the current reset line definition is incorrect. Patch #1 fixes > this. > > Since the fix requires moving from the deprecated "snps,reset-gpio" > property to the generic Ethernet PHY reset bindings I decided to move > all Amlogic boards over to the non-deprecated bindings. That's what > patches #2 and #3 do. > > Finally I found that Odroid-N2 doesn't define the Ethernet PHY's reset > GPIO yet. I don't have that board so I can't test whether it really > works but based on the schematics it should. > > This series is a partial successor to "stmmac: honor the GPIO flags > for the PHY reset GPIO" from [0]. I decided not to take Linus W.'s > Reviewed-by from patch #4 of that series because I had to change the > wording and I want to be sure that he's happy with that now. > > One quick note regarding patches #1 and #4: I decided to violate the > "max 80 characters per line" (by 4 characters) limit because I find > that the result is easier to read then it would be if I split the > line. > > > Changes since v1 at [1]: > - fixed the reset deassert delay for RTL8211F PHYs - spotted by Robin > Murphy (thank you). according to the public RTL8211E datasheet the > correct values seem to be: 10ms assert, 30ms deassert > - fixed the reset assert and deassert delays for IP101GR PHYs. There > are two values given in the public datasheet, use the higher one > (10ms instead of 2.5) > - update the patch descriptions to quote the datasheets (the RTL8211F > quotes are taken from the public RTL8211E datasheet because as far > as I can tell the reset sequence is identical on both PHYs) > > Changes since v2 at [2]: > - add Neil's Reviewed/Acked/Tested-by's (thank you!) > - rebased on top of "arm64: dts: meson-g12a-x96-max: add sound card" > > > [0] https://patchwork.kernel.org/cover/10983801/ > [1] https://patchwork.kernel.org/cover/10985155/ > [2] https://patchwork.kernel.org/cover/10990863/ Queued for v5.3... > Martin Blumenstingl (4): > arm64: dts: meson: g12a: x96-max: fix the Ethernet PHY reset line > ARM: dts: meson: switch to the generic Ethernet PHY reset bindings ...in branch v5.3/dt > arm64: dts: meson: use the generic Ethernet PHY reset GPIO bindings > arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY reset line The other 3 in v5.3/dt64, Thanks, Kevin