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[71.197.186.152]) by smtp.googlemail.com with ESMTPSA id g8sm2370035pgd.29.2019.06.06.09.30.53 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 06 Jun 2019 09:30:53 -0700 (PDT) From: Kevin Hilman To: Neil Armstrong , dri-devel@lists.freedesktop.org Cc: Neil Armstrong , linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] drm/meson: fix G12A HDMI PLL settings for 4K60 1000/1001 variations In-Reply-To: <20190605125320.8708-1-narmstrong@baylibre.com> References: <20190605125320.8708-1-narmstrong@baylibre.com> Date: Thu, 06 Jun 2019 09:30:52 -0700 Message-ID: <7hh892fzgj.fsf@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Neil Armstrong writes: > The Amlogic G12A HDMI PLL needs some specific settings to lock with > different fractional values for the 5,4GHz mode. > > Handle the 1000/1001 variation fractional case here to avoid having > the PLL in an non lockable state. > > Fixes: 202b9808f8ed ("drm/meson: Add G12A Video Clock setup") > Signed-off-by: Neil Armstrong > --- > drivers/gpu/drm/meson/meson_vclk.c | 13 +++++++++++-- > 1 file changed, 11 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c > index 44250eff8a3f..83fc2fc82001 100644 > --- a/drivers/gpu/drm/meson/meson_vclk.c > +++ b/drivers/gpu/drm/meson/meson_vclk.c > @@ -553,8 +553,17 @@ void meson_hdmi_pll_set_params(struct meson_drm *priv, unsigned int m, > > /* G12A HDMI PLL Needs specific parameters for 5.4GHz */ > if (m >= 0xf7) { > - regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0xea68dc00); > - regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x65771290); > + if (frac < 0x10000) { > + regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, > + 0x6a685c00); > + regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, > + 0x11551293); > + } else { > + regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, > + 0xea68dc00); > + regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, > + 0x65771290); > + } > regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL6, 0x39272000); > regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL7, 0x55540000); > } else { Reviewed-by: Kevin Hilman nit: this is continuing with more magic constants, and it would be nice to have them converted to #define'd bitfields. But since that isn't a new problem in this patch, it's fine to cleanup later. Kevin