From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753249AbeDSR66 (ORCPT ); Thu, 19 Apr 2018 13:58:58 -0400 Received: from mail-pl0-f67.google.com ([209.85.160.67]:46426 "EHLO mail-pl0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753097AbeDSR6z (ORCPT ); Thu, 19 Apr 2018 13:58:55 -0400 X-Google-Smtp-Source: AIpwx4/EJY+WiEoqJnfhCxqTc2FnTIQpCkiSkWuSUX+dmOOyPcdS+nIcF+lXT/wh5vQ4aqHe4C+g0A== From: Kevin Hilman To: Yixun Lan Cc: Nan Li , Carlo Caione , Jerome Brunet , Heiner Kallweit , Rob Herring , , , , , Subject: Re: [PATCH v2] ARM64: dts: meson-axg: enable the eMMC controller Organization: BayLibre References: <20180408113647.13543-1-yixun.lan@amlogic.com> Date: Thu, 19 Apr 2018 10:58:52 -0700 In-Reply-To: <20180408113647.13543-1-yixun.lan@amlogic.com> (Yixun Lan's message of "Sun, 8 Apr 2018 11:36:47 +0000") Message-ID: <7ho9if3wo3.fsf@baylibre.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.5 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Yixun Lan writes: > From: Nan Li > > The IP of eMMC controller in AXG is similiar to Meson-GX series. > Here we add the initial support of the HS200 mode with > clock running at 166MHz (to be safe), since we found some eMMC chip > fail to run at 200MHz due to tunning phase error. > > Signed-off-by: Nan Li > Signed-off-by: Yixun Lan Applied to v4.18/dt64 > --- > Hi Kevin > Please note this patch actually depend on the eMMC driver here [0]. > Still a few problem to solve, to improve the tuning phase driver to make > the clock running at 200MHz, and to further support the HS400 mode. > Anyway, this patch itself is quite independent. The driver changes are queued for v4.18 also. Good! Kevin