From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752419AbdJ3I2e (ORCPT ); Mon, 30 Oct 2017 04:28:34 -0400 Received: from mail-wr0-f196.google.com ([209.85.128.196]:55132 "EHLO mail-wr0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752367AbdJ3I2a (ORCPT ); Mon, 30 Oct 2017 04:28:30 -0400 X-Google-Smtp-Source: ABhQp+SPxCyi7oil23HpkgzpYuY2US30Wmwk30mZMpkNdtM8PiXt3nn+qaJ4h+WWk9dppLcAuOTSnA== From: Kevin Hilman To: Jerome Brunet Cc: Carlo Caione , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 0/5] ARM: meson: enable gpio interrupt controller Organization: BayLibre References: <20171019120143.20581-1-jbrunet@baylibre.com> Date: Mon, 30 Oct 2017 09:28:28 +0100 In-Reply-To: <20171019120143.20581-1-jbrunet@baylibre.com> (Jerome Brunet's message of "Thu, 19 Oct 2017 14:01:38 +0200") Message-ID: <7ho9opujir.fsf@baylibre.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.5 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Jerome Brunet writes: > This patchset enables gpio interrupt controller found on the meson SoC > family. ATM, it supports meson8b, gxbb and gxl. The meson8 has been left > out because I don't have the documentation of this particular SoC. > > The last patch uses the interrupts provided by this controller with the > external ethernet PHY found on a few platforms. > > Jerome Brunet (5): > ARM: meson: enable MESON_IRQ_GPIO in Kconfig for meson8b > ARM64: meson: enable MESON_IRQ_GPIO in Kconfig > ARM: dts: meson8b: enable gpio interrupt controller > ARM64: dts: meson-gx: add gpio interrupt controller > ARM64: dts: meson-gx: add external PHY interrupt on some platforms Applied, Kevin