From: Kevin Hilman <khilman@baylibre.com>
To: Yu Tu <yu.tu@amlogic.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Jerome Brunet <jbrunet@baylibre.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: "kelvin . zhang" <Kelvin.Zhang@amlogic.com>,
"qi . duan" <qi.duan@amlogic.com>
Subject: Re: [PATCH V6 1/3] dt-bindings: clock: document Amlogic S4 SoC PLL & peripheral clock controller
Date: Wed, 18 Jan 2023 16:38:52 -0800 [thread overview]
Message-ID: <7hwn5jqrxf.fsf@baylibre.com> (raw)
In-Reply-To: <7c0133a2-ea4d-645e-3df2-2bb832bbd498@amlogic.com>
Yu Tu <yu.tu@amlogic.com> writes:
> On 2023/1/16 16:29, Krzysztof Kozlowski wrote:
[...]
>>> diff --git a/include/dt-bindings/clock/amlogic,s4-peripherals-clkc.h b/include/dt-bindings/clock/amlogic,s4-peripherals-clkc.h
>>> new file mode 100644
>>> index 000000000000..bbec5094d5c3
>>> --- /dev/null
>>> +++ b/include/dt-bindings/clock/amlogic,s4-peripherals-clkc.h
>>> @@ -0,0 +1,131 @@
>>> +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
>>
>> Unusual license... are you sure to license the bindings under GPLv4 or
>> GPLv5? Fine by me.
>>
>
> Yes.
The rest of the bindings for Amlogic SoCs are GPL-2.0 (without the '+').
Adding the dual-license for MIT seems fine, but adding the '+' is
curious.
It would be helpful if you could please explain why you'd like these
bindings to be licensed differently than the rest of the SoC family.
Kevin
next prev parent reply other threads:[~2023-01-19 0:39 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-16 7:42 [PATCH V6 0/3] Add S4 SoC PLL and Peripheral clock controller Yu Tu
2023-01-16 7:42 ` [PATCH V6 1/3] dt-bindings: clock: document Amlogic S4 SoC PLL & peripheral " Yu Tu
2023-01-16 8:29 ` Krzysztof Kozlowski
2023-01-16 9:31 ` Yu Tu
2023-01-19 0:38 ` Kevin Hilman [this message]
2023-01-20 2:25 ` Yu Tu
2023-01-25 0:25 ` Kevin Hilman
2023-01-28 8:19 ` Yu Tu
2023-01-20 9:37 ` Jerome Brunet
2023-01-28 8:23 ` Yu Tu
2023-01-16 7:42 ` [PATCH V6 2/3] clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver Yu Tu
2023-01-19 11:20 ` Jerome Brunet
2023-01-20 2:58 ` Yu Tu
2023-01-20 9:43 ` Jerome Brunet
2023-01-28 8:36 ` Yu Tu
2023-01-16 7:42 ` [PATCH V6 3/3] clk: meson: s4: add support for Amlogic S4 SoC peripheral clock controller Yu Tu
2023-01-19 11:37 ` Jerome Brunet
2023-01-20 3:33 ` Yu Tu
2023-01-20 9:47 ` Jerome Brunet
2023-01-28 10:17 ` Yu Tu
2023-01-30 9:06 ` Jerome Brunet
2023-01-30 9:41 ` Yu Tu
2023-01-30 9:47 ` Jerome Brunet
2023-01-30 9:59 ` Yu Tu
2023-01-30 10:07 ` Jerome Brunet
2023-01-31 3:29 ` Yu Tu
2023-01-19 11:18 ` [PATCH V6 0/3] Add S4 SoC PLL and Peripheral " Jerome Brunet
2023-01-20 2:31 ` Yu Tu
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