From: Alexander Stein <alexander.stein@systec-electronic.com>
To: Meng Yi <meng.yi@nxp.com>
Cc: Stefan Agner <stefan@agner.ch>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>,
David Airlie <airlied@linux.ie>,
"airlied@redhat.com" <airlied@redhat.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Mark Brown <broonie@kernel.org>
Subject: Re: fsl-dcu not works on latest "drm-next"
Date: Wed, 25 May 2016 14:16:20 +0200 [thread overview]
Message-ID: <8051435.bV5T0CxpSc@ws-stein> (raw)
In-Reply-To: <HE1PR04MB10517E6E4C1D62992019C4C1EC400@HE1PR04MB1051.eurprd04.prod.outlook.com>
On Wednesday 25 May 2016 10:25:29, Meng Yi wrote:
> Hi Alexander,
> Thanks for your reply.
>
> > Commit d761701c55a99598477f3cb25c03d939a7711e74 only has one child
> > commit in my repo. Both touch only i915 related things. Please do a proper
> > bisect and name the offending commit. On which commit you got that
> > backtrace BTW?
> > From your backtrace I can't see anything related to regmap.
>
> It is weird that using bisect, for the commit log is not linear.
> I mean a newer date commit may be merged before an older date commit, when
> jump to that older date commit, the newer one will be lost, even though it
> is merged before older one. So, I think it's difficult to use git bisect.
> " d761701c55a99598477f3cb25c03d939a7711e74 " is just an older one, I mean
> between this commit and the next commit, maybe lots of commits are lost.
> So, it looks like this commit have nothing to do with the problem.
Why are commits lost? The order of commit dates is not straightforward, yes,
but that's not a problem at all.
> According to the backtrace, looks like the vblank interrupt is not happen or
> handled. Then I found the irq is installed successfully, so the problem
> seems like the vblank irq is not properly setup. And here is the point ,
> irq initia, irq handler and timing control code are using regmap.
>From your backtrace I guess wait_event_timeout is called in some atomic
context (might_sleep(); is called inside wait_event_timeout). This has nothing
to do with regmap.
> I read out the value of relevant register using "CodeWarrior TAP", find that
> endianness is not right.
>
> Then I changed endianness of the value to be written that using "
> regmap_write" . It works. But "regmap_update_bits" still have the problem.
>
> I had checked log of regmap, and didn't find which commit caused that.
The inital problem came up with 922a9f936e40001f9b921379aab90047d5990923
("regmap: mmio: Convert to regmap_bus and fix accessor usage"). The commits
9f9f8b863ad130ec0c25f378bdbad64ba71291de,
4f7d6dd4df8b388e2056c89b528254cdd79dea2a and
0dbdb76c0ca8e7caf27c9a210f64c4359e2974a4 tried to fix that. With those I could
successfully probe DCU.
Best regards,
Alexander
next prev parent reply other threads:[~2016-05-25 12:16 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <HE1PR04MB105158F9CB2CEC73E6B5F5E9EC7A0@HE1PR04MB1051.eurprd04.prod.outlook.com>
2016-05-25 2:14 ` fsl-dcu not works on latest "drm-next" Meng Yi
2016-05-25 6:20 ` Stefan Agner
2016-05-25 8:32 ` Alexander Stein
2016-05-25 8:58 ` Meng Yi
2016-05-25 9:57 ` Alexander Stein
2016-05-25 10:25 ` Meng Yi
2016-05-25 12:16 ` Alexander Stein [this message]
2016-05-26 8:18 ` Meng Yi
2016-05-26 9:11 ` Alexander Stein
2016-05-25 9:18 ` Mark Brown
2016-05-25 9:59 ` Meng Yi
2016-05-25 10:41 ` Mark Brown
2016-05-26 8:23 ` Meng Yi
2016-05-26 9:11 ` Alexander Stein
2016-05-27 5:54 ` Stefan Agner
2016-05-27 12:20 ` Mark Brown
2016-05-27 17:36 ` Stefan Agner
2016-05-27 19:50 ` Mark Brown
2016-06-03 22:52 ` Stefan Agner
2016-06-07 2:16 ` Meng Yi
2016-06-07 2:46 ` Stefan Agner
2016-06-07 3:47 ` Meng Yi
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