[tip: x86/entry] x86/entry: Disable interrupts for native_load_gs_index() in C code

tip-bot2 for Thomas Gleixner
2020-05-19T19:59:25Z

The following commit has been merged into the x86/entry branch of tip:

Commit-ID: 800c8a1afb8e9d71ffb1ff54d6a2cf5c45dc50b5
Gitweb: https://git.kernel.org/tip/800c8a1afb8e9d71ffb1ff54d6a2cf5c45dc50b5
Author: Thomas Gleixner <tglx@linutronix.de>
AuthorDate: Wed, 04 Mar 2020 23:32:15 +01:00
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Tue, 19 May 2020 16:03:53 +02:00

x86/entry: Disable interrupts for native_load_gs_index() in C code

There is absolutely no point in doing this in ASM code. Move it to C.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Acked-by: Andy Lutomirski <luto@kernel.org>
Link: https://lkml.kernel.org/r/20200505134903.531534675@linutronix.de

---
arch/x86/entry/entry_64.S | 11 +++--------
arch/x86/include/asm/special_insns.h | 14 ++++++++++++--
2 files changed, 15 insertions(+), 10 deletions(-)

diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
index 9866b54..be8ed3a 100644
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -1041,22 +1041,17 @@ idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
*
* Is in entry.text as it shouldn't be instrumented.
*/
-SYM_FUNC_START(native_load_gs_index)
+SYM_FUNC_START(asm_load_gs_index)
FRAME_BEGIN
- pushfq
- DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
- TRACE_IRQS_OFF
SWAPGS
.Lgs_change:
movl %edi, %gs
2: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE
SWAPGS
- TRACE_IRQS_FLAGS (%rsp)
- popfq
FRAME_END
ret
-SYM_FUNC_END(native_load_gs_index)
-EXPORT_SYMBOL(native_load_gs_index)
+SYM_FUNC_END(asm_load_gs_index)
+EXPORT_SYMBOL(asm_load_gs_index)

_ASM_EXTABLE(.Lgs_change, .Lbad_gs)
.section .fixup, "ax"
diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
index 6d37b8f..82436cb 100644
--- a/arch/x86/include/asm/special_insns.h
+++ b/arch/x86/include/asm/special_insns.h
@@ -7,6 +7,7 @@

#include <asm/nops.h>
#include <asm/processor-flags.h>
+#include <linux/irqflags.h>
#include <linux/jump_label.h>

/*
@@ -129,7 +130,16 @@ static inline void native_wbinvd(void)
asm volatile("wbinvd": : :"memory");
}

-extern asmlinkage void native_load_gs_index(unsigned);
+extern asmlinkage void asm_load_gs_index(unsigned int selector);
+
+static inline void native_load_gs_index(unsigned int selector)
+{
+ unsigned long flags;
+
+ local_irq_save(flags);
+ asm_load_gs_index(selector);
+ local_irq_restore(flags);
+}

static inline unsigned long __read_cr4(void)
{
@@ -186,7 +196,7 @@ static inline void wbinvd(void)

#ifdef CONFIG_X86_64

-static inline void load_gs_index(unsigned selector)
+static inline void load_gs_index(unsigned int selector)
{
native_load_gs_index(selector);
}