* [tip:perfcounters/core] perf_counter, x86: Extend perf_counter Pentium M support
[not found] <new-submission>
@ 2009-07-13 6:49 ` tip-bot for Daniel Qarras
0 siblings, 0 replies; 2+ messages in thread
From: tip-bot for Daniel Qarras @ 2009-07-13 6:49 UTC (permalink / raw)
To: linux-tip-commits
Cc: linux-kernel, dqarras, hpa, mingo, eranian, a.p.zijlstra, vince,
tglx, mingo
Commit-ID: f1c6a58121f9846ac665b0fbd3cbab90ce8bcbac
Gitweb: http://git.kernel.org/tip/f1c6a58121f9846ac665b0fbd3cbab90ce8bcbac
Author: Daniel Qarras <dqarras@yahoo.com>
AuthorDate: Sun, 12 Jul 2009 04:32:40 -0700
Committer: Ingo Molnar <mingo@elte.hu>
CommitDate: Mon, 13 Jul 2009 08:46:51 +0200
perf_counter, x86: Extend perf_counter Pentium M support
I've attached a patch to remove the Pentium M special casing of
EMON and as noticed at least with my Pentium M the hardware PMU
now works:
Performance counter stats for '/bin/ls /var/tmp':
1.809988 task-clock-msecs # 0.125 CPUs
1 context-switches # 0.001 M/sec
0 CPU-migrations # 0.000 M/sec
224 page-faults # 0.124 M/sec
1425648 cycles # 787.656 M/sec
912755 instructions # 0.640 IPC
Vince suggested that this code was trying to address erratum
Y17 in Pentium-M's:
http://download.intel.com/support/processors/mobile/pm/sb/25266532.pdf
But that erratum (related to IA32_MISC_ENABLES.7) does not
affect perfcounters as we dont use this toggle to disable RDPMC
and WRMSR/RDMSR access to performance counters. We keep cr4's
bit 8 (X86_CR4_PCE) clear so unprivileged RDPMC access is not
allowed anyway.
Cc: Vince Weaver <vince@deater.net>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Stephane Eranian <eranian@googlemail.com>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
---
arch/x86/kernel/cpu/perf_counter.c | 6 ++----
1 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_counter.c
index bed1c4c..7e346d4 100644
--- a/arch/x86/kernel/cpu/perf_counter.c
+++ b/arch/x86/kernel/cpu/perf_counter.c
@@ -1583,10 +1583,8 @@ static int p6_pmu_init(void)
break;
case 9:
case 13:
- /* for Pentium M, we need to check if PMU exist */
- rdmsr(MSR_IA32_MISC_ENABLE, low, high);
- if (low & MSR_IA32_MISC_ENABLE_EMON)
- break;
+ /* Pentium M */
+ break;
default:
pr_cont("unsupported p6 CPU model %d ",
boot_cpu_data.x86_model);
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [tip:perfcounters/core] perf_counter, x86: Extend perf_counter Pentium M support
@ 2009-07-13 9:19 Daniel Qarras
0 siblings, 0 replies; 2+ messages in thread
From: Daniel Qarras @ 2009-07-13 9:19 UTC (permalink / raw)
To: linux-tip-commits
Cc: linux-kernel, hpa, mingo, eranian, a.p.zijlstra, vince, tglx,
mingo
Hi!
Verified, still works ok as expected.
Signed-off-by: Daniel Qarras <dqarras@yahoo.com>
Thanks!
> From: tip-bot for Daniel Qarras <dqarras@yahoo.com>
> Subject: [tip:perfcounters/core] perf_counter, x86: Extend perf_counter Pentium M support
> To: linux-tip-commits@vger.kernel.org
> Commit-ID: f1c6a58121f9846ac665b0fbd3cbab90ce8bcbac
^ permalink raw reply [flat|nested] 2+ messages in thread
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