From: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
To: Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Shiju Jose <shiju.jose@huawei.com>
Cc: Yazen Ghannam <yazen.ghannam@amd.com>,
Davidlohr Bueso <dave@stgolabs.net>,
Dave Jiang <dave.jiang@intel.com>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ard Biesheuvel <ardb@kernel.org>,
linux-efi@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-cxl@vger.kernel.org
Subject: Re: [PATCH v5 9/9] cxl/pci: Register for and process CPER events
Date: Tue, 2 Jan 2024 07:14:10 -0800 [thread overview]
Message-ID: <80a5515e-4eae-37b7-08c1-03573ec4e37c@amd.com> (raw)
In-Reply-To: <20231220-cxl-cper-v5-9-1bb8a4ca2c7a@intel.com>
Hi Ira,
I tested these patches. It works as expected.
Tested-by: Smita-Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
Reviewed-by: Smita-Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
Since, the trace support for FW-First Protocol errors are missing I
wrote a patch for it. I reused the existing registered callback
cxl_cper_callback making some changes to it. Please take a look and let
me know what you think. I'm not sure if its appropriate to reuse the
existing callback or define a new one..
https://lore.kernel.org/linux-cxl/20240102150933.161009-1-Smita.KoralahalliChannabasappa@amd.com/T/#t
Thanks,
Smita
On 12/20/2023 4:17 PM, Ira Weiny wrote:
> If the firmware has configured CXL event support to be firmware first
> the OS can process those events through CPER records. The CXL layer has
> unique DPA to HPA knowledge and standard event trace parsing in place.
>
> CPER records contain Bus, Device, Function information which can be used
> to identify the PCI device which is sending the event.
>
> Change the PCI driver registration to include registration of a CXL
> CPER callback to process events through the trace subsystem.
>
> Use new scoped based management to simplify the handling of the PCI
> device object.
>
> NOTE this patch depends on Dan's addition of a device guard[1].
>
> [1] https://lore.kernel.org/all/170250854466.1522182.17555361077409628655.stgit@dwillia2-xfh.jf.intel.com/
>
> ---
> Changes for v5:
> [Smita/djbw: trace a generic UUID if the type is unknown]
> [Jonathan: clean up pci and device state error handling]
> [iweiny: consolidate the trace function]
> ---
> drivers/cxl/core/mbox.c | 49 ++++++++++++++++++++++++++++-----------
> drivers/cxl/cxlmem.h | 4 ++++
> drivers/cxl/pci.c | 58 ++++++++++++++++++++++++++++++++++++++++++++++-
> include/linux/cxl-event.h | 1 +
> 4 files changed, 98 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c
> index 06957696247b..b801faaccd45 100644
> --- a/drivers/cxl/core/mbox.c
> +++ b/drivers/cxl/core/mbox.c
> @@ -836,21 +836,44 @@ int cxl_enumerate_cmds(struct cxl_memdev_state *mds)
> }
> EXPORT_SYMBOL_NS_GPL(cxl_enumerate_cmds, CXL);
>
> -static void cxl_event_trace_record(const struct cxl_memdev *cxlmd,
> - enum cxl_event_log_type type,
> - struct cxl_event_record_raw *record)
> +void cxl_event_trace_record(const struct cxl_memdev *cxlmd,
> + enum cxl_event_log_type type,
> + enum cxl_event_type event_type,
> + const uuid_t *uuid, union cxl_event *evt)
> {
> - union cxl_event *evt = &record->event;
> - uuid_t *id = &record->id;
> -
> - if (uuid_equal(id, &CXL_EVENT_GEN_MEDIA_UUID))
> + switch (event_type) {
> + case CXL_CPER_EVENT_GEN_MEDIA:
> trace_cxl_general_media(cxlmd, type, &evt->gen_media);
> - else if (uuid_equal(id, &CXL_EVENT_DRAM_UUID))
> + break;
> + case CXL_CPER_EVENT_DRAM:
> trace_cxl_dram(cxlmd, type, &evt->dram);
> - else if (uuid_equal(id, &CXL_EVENT_MEM_MODULE_UUID))
> + break;
> + case CXL_CPER_EVENT_MEM_MODULE:
> trace_cxl_memory_module(cxlmd, type, &evt->mem_module);
> - else
> - trace_cxl_generic_event(cxlmd, type, id, &evt->generic);
> + break;
> + case CXL_CPER_EVENT_GENERIC:
> + default:
> + trace_cxl_generic_event(cxlmd, type, uuid, &evt->generic);
> + break;
> + }
> +}
> +EXPORT_SYMBOL_NS_GPL(cxl_event_trace_record, CXL);
> +
> +static void __cxl_event_trace_record(const struct cxl_memdev *cxlmd,
> + enum cxl_event_log_type type,
> + struct cxl_event_record_raw *record)
> +{
> + enum cxl_event_type ev_type = CXL_CPER_EVENT_GENERIC;
> + const uuid_t *uuid = &record->id;
> +
> + if (uuid_equal(uuid, &CXL_EVENT_GEN_MEDIA_UUID))
> + ev_type = CXL_CPER_EVENT_GEN_MEDIA;
> + else if (uuid_equal(uuid, &CXL_EVENT_DRAM_UUID))
> + ev_type = CXL_CPER_EVENT_DRAM;
> + else if (uuid_equal(uuid, &CXL_EVENT_MEM_MODULE_UUID))
> + ev_type = CXL_CPER_EVENT_MEM_MODULE;
> +
> + cxl_event_trace_record(cxlmd, type, ev_type, uuid, &record->event);
> }
>
> static int cxl_clear_event_record(struct cxl_memdev_state *mds,
> @@ -961,8 +984,8 @@ static void cxl_mem_get_records_log(struct cxl_memdev_state *mds,
> break;
>
> for (i = 0; i < nr_rec; i++)
> - cxl_event_trace_record(cxlmd, type,
> - &payload->records[i]);
> + __cxl_event_trace_record(cxlmd, type,
> + &payload->records[i]);
>
> if (payload->flags & CXL_GET_EVENT_FLAG_OVERFLOW)
> trace_cxl_overflow(cxlmd, type, payload);
> diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
> index e5d770e26e02..80076c235073 100644
> --- a/drivers/cxl/cxlmem.h
> +++ b/drivers/cxl/cxlmem.h
> @@ -802,6 +802,10 @@ void set_exclusive_cxl_commands(struct cxl_memdev_state *mds,
> void clear_exclusive_cxl_commands(struct cxl_memdev_state *mds,
> unsigned long *cmds);
> void cxl_mem_get_event_records(struct cxl_memdev_state *mds, u32 status);
> +void cxl_event_trace_record(const struct cxl_memdev *cxlmd,
> + enum cxl_event_log_type type,
> + enum cxl_event_type event_type,
> + const uuid_t *uuid, union cxl_event *evt);
> int cxl_set_timestamp(struct cxl_memdev_state *mds);
> int cxl_poison_state_init(struct cxl_memdev_state *mds);
> int cxl_mem_get_poison(struct cxl_memdev *cxlmd, u64 offset, u64 len,
> diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
> index 0155fb66b580..b14237f824cf 100644
> --- a/drivers/cxl/pci.c
> +++ b/drivers/cxl/pci.c
> @@ -1,5 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0-only
> /* Copyright(c) 2020 Intel Corporation. All rights reserved. */
> +#include <asm-generic/unaligned.h>
> #include <linux/io-64-nonatomic-lo-hi.h>
> #include <linux/moduleparam.h>
> #include <linux/module.h>
> @@ -969,6 +970,61 @@ static struct pci_driver cxl_pci_driver = {
> },
> };
>
> +#define CXL_EVENT_HDR_FLAGS_REC_SEVERITY GENMASK(1, 0)
> +static void cxl_cper_event_call(enum cxl_event_type ev_type,
> + struct cxl_cper_event_rec *rec)
> +{
> + struct cper_cxl_event_devid *device_id = &rec->hdr.device_id;
> + struct pci_dev *pdev __free(pci_dev_put) = NULL;
> + enum cxl_event_log_type log_type;
> + struct cxl_dev_state *cxlds;
> + unsigned int devfn;
> + u32 hdr_flags;
> +
> + devfn = PCI_DEVFN(device_id->device_num, device_id->func_num);
> + pdev = pci_get_domain_bus_and_slot(device_id->segment_num,
> + device_id->bus_num, devfn);
> + if (!pdev)
> + return;
> +
> + guard(device)(&pdev->dev);
> + if (pdev->driver != &cxl_pci_driver)
> + return;
> +
> + cxlds = pci_get_drvdata(pdev);
> + if (!cxlds)
> + return;
> +
> + /* Fabricate a log type */
> + hdr_flags = get_unaligned_le24(rec->event.generic.hdr.flags);
> + log_type = FIELD_GET(CXL_EVENT_HDR_FLAGS_REC_SEVERITY, hdr_flags);
> +
> + cxl_event_trace_record(cxlds->cxlmd, log_type, ev_type,
> + &uuid_null, &rec->event);
> +}
> +
> +static int __init cxl_pci_driver_init(void)
> +{
> + int rc;
> +
> + rc = pci_register_driver(&cxl_pci_driver);
> + if (rc)
> + return rc;
> +
> + rc = cxl_cper_register_callback(cxl_cper_event_call);
> + if (rc)
> + pci_unregister_driver(&cxl_pci_driver);
> +
> + return rc;
> +}
> +
> +static void __exit cxl_pci_driver_exit(void)
> +{
> + cxl_cper_unregister_callback(cxl_cper_event_call);
> + pci_unregister_driver(&cxl_pci_driver);
> +}
> +
> +module_init(cxl_pci_driver_init);
> +module_exit(cxl_pci_driver_exit);
> MODULE_LICENSE("GPL v2");
> -module_pci_driver(cxl_pci_driver);
> MODULE_IMPORT_NS(CXL);
> diff --git a/include/linux/cxl-event.h b/include/linux/cxl-event.h
> index 71e3646f7569..17eadee819b6 100644
> --- a/include/linux/cxl-event.h
> +++ b/include/linux/cxl-event.h
> @@ -109,6 +109,7 @@ struct cxl_event_record_raw {
> } __packed;
>
> enum cxl_event_type {
> + CXL_CPER_EVENT_GENERIC,
> CXL_CPER_EVENT_GEN_MEDIA,
> CXL_CPER_EVENT_DRAM,
> CXL_CPER_EVENT_MEM_MODULE,
>
next prev parent reply other threads:[~2024-01-02 15:14 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-21 0:17 [PATCH v5 0/9] efi/cxl-cper: Report CPER CXL component events through trace events Ira Weiny
2023-12-21 0:17 ` [PATCH v5 1/9] cxl/trace: Pass uuid explicitly to event traces Ira Weiny
2024-01-08 12:56 ` Jonathan Cameron
2023-12-21 0:17 ` [PATCH v5 2/9] cxl/events: Promote CXL event structures to a core header Ira Weiny
2024-01-08 13:05 ` Jonathan Cameron
2023-12-21 0:17 ` [PATCH v5 3/9] cxl/events: Create common event UUID defines Ira Weiny
2024-01-08 13:07 ` Jonathan Cameron
2023-12-21 0:17 ` [PATCH v5 4/9] cxl/events: Remove passing a UUID to known event traces Ira Weiny
2024-01-08 13:23 ` Jonathan Cameron
2024-01-09 23:38 ` Dan Williams
2024-01-10 14:22 ` Jonathan Cameron
2023-12-21 0:17 ` [PATCH v5 5/9] cxl/events: Separate UUID from event structures Ira Weiny
2024-01-08 13:27 ` Jonathan Cameron
2023-12-21 0:17 ` [PATCH v5 6/9] cxl/events: Create a CXL event union Ira Weiny
2024-01-08 13:31 ` Jonathan Cameron
2023-12-21 0:17 ` [PATCH v5 7/9] acpi/ghes: Process CXL Component Events Ira Weiny
2024-01-08 13:41 ` Jonathan Cameron
2023-12-21 0:17 ` [PATCH v5 8/9] PCI: Define scoped based management functions Ira Weiny
2024-01-03 22:38 ` Dan Williams
2024-01-03 23:01 ` Bjorn Helgaas
2024-01-04 0:21 ` Dan Williams
2024-01-04 17:17 ` Ira Weiny
2024-01-04 18:32 ` Bjorn Helgaas
2024-01-04 18:59 ` Dan Williams
2024-01-04 21:46 ` Ira Weiny
2024-01-04 22:37 ` Bjorn Helgaas
2024-01-04 23:00 ` Ira Weiny
2024-01-04 6:05 ` Lukas Wunner
2024-01-04 6:43 ` Dan Williams
2024-01-04 7:02 ` Lukas Wunner
2024-01-04 7:37 ` Ard Biesheuvel
2024-01-04 17:41 ` Dan Williams
2024-01-08 13:44 ` Jonathan Cameron
2023-12-21 0:17 ` [PATCH v5 9/9] cxl/pci: Register for and process CPER events Ira Weiny
2024-01-02 15:14 ` Smita Koralahalli [this message]
2024-01-02 20:29 ` Ira Weiny
2024-01-03 22:08 ` Dan Williams
2024-01-04 18:31 ` Ira Weiny
2024-01-08 13:50 ` Jonathan Cameron
2024-01-09 23:59 ` Dan Williams
2024-01-04 22:55 ` [PATCH v5 0/9] efi/cxl-cper: Report CPER CXL component events through trace events Bjorn Helgaas
2024-01-08 16:58 ` Jonathan Cameron
2024-01-08 20:04 ` Smita Koralahalli
2024-01-09 2:08 ` Dan Williams
2024-01-09 2:32 ` Ira Weiny
2024-01-09 2:59 ` Dan Williams
2024-01-09 16:04 ` Jonathan Cameron
2024-01-09 20:49 ` Dan Williams
2024-01-09 23:30 ` Dan Williams
2024-01-09 23:31 ` Ard Biesheuvel
2024-01-10 14:24 ` Jonathan Cameron
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