From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753239AbdBMQW4 (ORCPT ); Mon, 13 Feb 2017 11:22:56 -0500 Received: from mailout4.samsung.com ([203.254.224.34]:57069 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752552AbdBMQWy (ORCPT ); Mon, 13 Feb 2017 11:22:54 -0500 X-AuditID: b6c32a59-f79be6d0000012bb-5b-58a1dd5a284c From: Bartlomiej Zolnierkiewicz To: Krzysztof Kozlowski Cc: Zhang Rui , Eduardo Valentin , Kukjin Kim , Javier Martinez Canillas , linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Willy WOLFF , Anand Moon Subject: Re: [PATCH] ARM: dts: exynos: Use thermal fuse value for thermal zone 0 on Exynos5420 Date: Mon, 13 Feb 2017 17:22:48 +0100 Message-id: <8266689.kdSZWCWITZ@amdc3058> User-Agent: KMail/4.13.3 (Linux/3.13.0-96-generic; KDE/4.13.3; x86_64; ; ) In-reply-to: <20170211201456.27974-1-krzk@kernel.org> MIME-version: 1.0 Content-transfer-encoding: 7Bit Content-type: text/plain; charset=us-ascii X-Brightmail-Tracker: H4sIAAAAAAAAA02Sa0hTYRjHeXe2neNydZyXHhypjEq0NKWEQ0l0+zDyS/XJhNBDHlTc1DY1 rQ8ZeTd1IqUOSSXtMm9tU1dWy+uUQFdoykyN0DAtKzPN8NaOZ4Lffs/z/t7n4f/yEphEL/Ak 4hKSGVUCrZAJRfy2bj//gIiJmvAgY+5BqqpnUEBVDY8IqO/zDTyqeOobRlmtz3DKMGXvDbVX CqnFwh5ElVvNPKpJP4ZT05+LhFRF1jL/lLP8hXYClz98NcuTG3R5Qrmx9pa8pdjeWjR4XRBG iEKjGUVcKqM6cjJKFGv69ANPGvRN0/drBRmo2ScfORFAHoOhvDKMYw94N9kszEciQkLWIcho mOFzRQ4PNp9OYds3/tleO6xKBMsb4xhXLCHI/tmJs5aQPA4lOTrEshvpB6PrfwWshJEaDBbm Fu03CMKVjIJaqzvr8MkDcOe2lc+y2O63Wx7zWHYnz0OLOWeLncgQ+JjZinOOC6yUTm75GOkN 5jf3BBwfhgFLE2J3AfkWh96yeR67C8h9YOhwJDgHw22ZQo5dYa6vBedYCut1Y4jjMgSmVeDm GBHoXmoc0gno7nvvWLYbClenHfPFkJst4RQ5FG9aHHNOQ4ZFi7gHykVQW5rL1yBv7Y4M2h0Z tDsyVCNMhzyYJLUyhlGHJIUEqmmlOiUhJvBqotKAtj6S/+XnaLjiUhciCSRzFlPmmnCJgE5V pyu7EBCYzE1sHLO3xNF0+g1GlRipSlEw6i4kJfiyveKIoJJwCRlDJzPxDJPEqLZPeYSTZwYq qtN0rO+f6Sy1mWU2Wf0oM+uTdTGeHIwcvva1vCCzqMJGH6rRtdXnmwpcO/rXJh/5NDUHhIWm 3ZXpe6WmmQcFXxJFZ8YlTwJ3FWiI6qzEpoWojdjssMbrZ71G5vYo7qOlo8ErniPEzZDFxiu/ pPSfFN/W31UTloFpF1vr2ocVGV8dSwf7Yyo1/R8Ec92sRAMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrMIsWRmVeSWpSXmKPExsVy+t9jQd2ouwsjDJbeEraYf+Qcq8X8K9dY Ld68XcNk0f/4NbPF+fMb2C02PQaKXd41h83ic+8RRosZ5/cxWazbeIvd4snDPjaLma3fWBx4 PHbOusvusXjPSyaPTas62Tw2L6n32NIPFPq8SS6ALcrNJiM1MSW1SCE1Lzk/JTMv3VYpNMRN 10JJIS8xN9VWKULXNyRISaEsMacUyDMyQAMOzgHuwUr6dgluGdvvv2MvOKdesfHELNYGxvUK XYycHBICJhI/b+5lg7DFJC7cWw9mCwnMYpSY+zyxi5ELyP7KKHFuzTNWkASbgJXExPZVjCC2 iICmxPW/31lBipgFJjBLXLk3AywhLJAg8erqQxYQm0VAVaK58TyYzQvUsOvYciYQW1TAS2LL vnYwm1PAVOJ2y1Z2iG1djBKXnkMU8QoISvyYfA+smVlAXmLf/qmsELaWxPqdx5kmMALdiVA2 C0nZLCRlCxiZVzFKpBYkFxQnpeca5aWW6xUn5haX5qXrJefnbmIER+gz6R2Mh3e5H2IU4GBU 4uGdcGBhhBBrYllxZe4hRgkOZiUR3s23gEK8KYmVValF+fFFpTmpxYcYTYE+nMgsJZqcD0we eSXxhibmJubGBhbmlpYmRkrivI2zn4ULCaQnlqRmp6YWpBbB9DFxcEo1MHZyCF03/TfjtuL0 L+v+M++Rd5l8ISynV3v2DzbXZ/kSao0bO6KieL+E/1108DFPtpKItRrLdY+jT+3SuOMWx6/R fKjqV60guttV/ZrsKudzWvPcFs5XucnwQf7TnN9fbKOnVVlt4b2nGN222MWkKnmfe8SmJ2ec PHn7i4qnaf9K7n3mxF52VImlOCPRUIu5qDgRABBJSkDmAgAA X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170213162250epcas5p23001bc0734c875b75ae51d3b8367055f X-Msg-Generator: CA X-Sender-IP: 203.254.230.27 X-Local-Sender: =?UTF-8?B?QmFydGxvbWllaiBab2xuaWVya2lld2ljehtTUlBPTC1LZXJu?= =?UTF-8?B?ZWwgKFRQKRvsgrzshLHsoITsnpAbU2VuaW9yIFNvZnR3YXJlIEVuZ2luZWVy?= X-Global-Sender: =?UTF-8?B?QmFydGxvbWllaiBab2xuaWVya2lld2ljehtTUlBPTC1LZXJu?= =?UTF-8?B?ZWwgKFRQKRtTYW1zdW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBF?= =?UTF-8?B?bmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 105P X-HopCount: 7 X-CMS-RootMailID: 20170211201512epcas2p2a49d26ddfbe2eaa6195927cbf01d48bb X-RootMTR: 20170211201512epcas2p2a49d26ddfbe2eaa6195927cbf01d48bb References: <20170211201456.27974-1-krzk@kernel.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Saturday, February 11, 2017 10:14:56 PM Krzysztof Kozlowski wrote: > In Odroid XU3 Lite board, the temperature levels reported for thermal > zone 0 were weird. In warm room: > /sys/class/thermal/thermal_zone0/temp:32000 > /sys/class/thermal/thermal_zone1/temp:51000 > /sys/class/thermal/thermal_zone2/temp:55000 > /sys/class/thermal/thermal_zone3/temp:54000 > /sys/class/thermal/thermal_zone4/temp:51000 > > Sometimes after booting the value was even equal to ambient temperature > which is highly unlikely to be a real temperature of sensor in SoC. > > The thermal sensor's calibration (trimming) is based on fused values. > In case of the board above, the fused values are: 35, 52, 43, 58 and 43 > (corresponding to each TMU device). However driver defined a minimum value > for fused data as 40 and for smaller values it was using a hard-coded 55 > instead. This lead to mapping data from sensor to wrong temperatures > for thermal zone 0. > > Various vendor 3.10 trees (Hardkernel's based on Samsung LSI, Artik 10) > do not impose any limits on fused values. Since we do not have any > knowledge about these limits, use 0 as a minimum accepted fused value. > This should essentially allow accepting any reasonable fused value thus > behaving like vendor driver. > > The exynos5420-tmu-sensor-conf.dtsi is copied directly from existing > exynso4412 with one change - the samsung,tmu_min_efuse_value. > > Signed-off-by: Krzysztof Kozlowski Acked-by: Bartlomiej Zolnierkiewicz Best regards, -- Bartlomiej Zolnierkiewicz Samsung R&D Institute Poland Samsung Electronics > --- > > Testing on other Exynos542x boards is much appreciated. Especially I > wonder what efuse values are there. > --- > arch/arm/boot/dts/exynos5420-tmu-sensor-conf.dtsi | 25 +++++++++++++++++++++++ > arch/arm/boot/dts/exynos5420.dtsi | 10 ++++----- > 2 files changed, 30 insertions(+), 5 deletions(-) > create mode 100644 arch/arm/boot/dts/exynos5420-tmu-sensor-conf.dtsi > > diff --git a/arch/arm/boot/dts/exynos5420-tmu-sensor-conf.dtsi b/arch/arm/boot/dts/exynos5420-tmu-sensor-conf.dtsi > new file mode 100644 > index 000000000000..c8771c660550 > --- /dev/null > +++ b/arch/arm/boot/dts/exynos5420-tmu-sensor-conf.dtsi > @@ -0,0 +1,25 @@ > +/* > + * Device tree sources for Exynos5420 TMU sensor configuration > + * > + * Copyright (c) 2014 Lukasz Majewski > + * Copyright (c) 2017 Krzysztof Kozlowski > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + */ > + > +#include > + > +#thermal-sensor-cells = <0>; > +samsung,tmu_gain = <8>; > +samsung,tmu_reference_voltage = <16>; > +samsung,tmu_noise_cancel_mode = <4>; > +samsung,tmu_efuse_value = <55>; > +samsung,tmu_min_efuse_value = <0>; > +samsung,tmu_max_efuse_value = <100>; > +samsung,tmu_first_point_trim = <25>; > +samsung,tmu_second_point_trim = <85>; > +samsung,tmu_default_temp_offset = <50>; > +samsung,tmu_cal_type = ; > diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi > index 7dc9dc82afd8..83b3899d228d 100644 > --- a/arch/arm/boot/dts/exynos5420.dtsi > +++ b/arch/arm/boot/dts/exynos5420.dtsi > @@ -699,7 +699,7 @@ > interrupts = <0 65 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clock CLK_TMU>; > clock-names = "tmu_apbif"; > - #include "exynos4412-tmu-sensor-conf.dtsi" > + #include "exynos5420-tmu-sensor-conf.dtsi" > }; > > tmu_cpu1: tmu@10064000 { > @@ -708,7 +708,7 @@ > interrupts = <0 183 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clock CLK_TMU>; > clock-names = "tmu_apbif"; > - #include "exynos4412-tmu-sensor-conf.dtsi" > + #include "exynos5420-tmu-sensor-conf.dtsi" > }; > > tmu_cpu2: tmu@10068000 { > @@ -717,7 +717,7 @@ > interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clock CLK_TMU>, <&clock CLK_TMU>; > clock-names = "tmu_apbif", "tmu_triminfo_apbif"; > - #include "exynos4412-tmu-sensor-conf.dtsi" > + #include "exynos5420-tmu-sensor-conf.dtsi" > }; > > tmu_cpu3: tmu@1006c000 { > @@ -726,7 +726,7 @@ > interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>; > clock-names = "tmu_apbif", "tmu_triminfo_apbif"; > - #include "exynos4412-tmu-sensor-conf.dtsi" > + #include "exynos5420-tmu-sensor-conf.dtsi" > }; > > tmu_gpu: tmu@100a0000 { > @@ -735,7 +735,7 @@ > interrupts = <0 215 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>; > clock-names = "tmu_apbif", "tmu_triminfo_apbif"; > - #include "exynos4412-tmu-sensor-conf.dtsi" > + #include "exynos5420-tmu-sensor-conf.dtsi" > }; > > sysmmu_g2dr: sysmmu@0x10A60000 {