Re: [PATCH v7 12/17] cxl/pci: Add error handler for CXL PCIe Port RAS errors

Dan Williams
2025-02-18T17:16:07Z

Bowman, Terry wrote:
[..]
> >> Or, if you like I can start to add the CXL kfifo changes now.
> > I feel like there's enough examples of kfifo in error handling to make
> > this not too burdensome, but let me know if you disagree. Otherwise,
> > would need to spend the time to figure out how to keep the test
> > environment functioning (cxl-test depends on modular core builds).
>
> Thanks for the feedback. Yes, there are several examples and Smita is using for
> FW-first as well. Correct me if I'm wrong but the goal in this case is
> for the FW-first and OS-first to use the same kfifo.

Not necessarily, the leaf handlers should unify around
cxl_do_recovery(), however you will notice that CPER PCIe AER events get
routed to the aer_recover_ring kfifo and native PCIe AER events get
collected by the aer_rpc.aer_fifo. Both of those route to
pcie_do_recovery() on the backend.

The CXL kfifo is to allow the CXL subsystem to remain modular and only
minimally burden the PCIe AER flow with just enough logic to determine
"not a PCIe AER event".