From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 61A944266BE for ; Thu, 14 May 2026 15:26:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778772391; cv=none; b=TUAFMNP3PjwlY4hD3Xx6o9eYnl7a+6BRtpDmbIq8G/N0U7uD66obypuGHi+vvseYUxqOt8BuGTiCY12UwnRopTc6hJeQitE1LYoeBVkOAaEmWcjSIXx1aEPYZFqvhf3J7s4b4OijgCfFeC0+eu/Em3X7Lhg8tGNhOlY1F8CViPc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778772391; c=relaxed/simple; bh=Aca4nt0XJ7z4BtUbkxRncNp8MuG2UR/vTMIJmbPedBw=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=HciC7RgWeoC/NF8F9Zc/MxNm9cA9wqr6/fenwO6sQNAhV1juc9l5U1+rGQNXdBTTJmFmfeCSTdbe5MTaptWNW+SaY5hHlhh7tToK6BI3rrLbfhtb6TxNQqIi+AzdCHtAPzpOb7cy/8z4MQW8U8g/gne+rSJ6tF+hGnBcK/T2FXk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=QPEyLWhH; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="QPEyLWhH" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7EE141655; Thu, 14 May 2026 08:26:24 -0700 (PDT) Received: from [10.1.37.28] (e122027.cambridge.arm.com [10.1.37.28]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EA0F63F836; Thu, 14 May 2026 08:26:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778772389; bh=Aca4nt0XJ7z4BtUbkxRncNp8MuG2UR/vTMIJmbPedBw=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=QPEyLWhH+sd6QLYwbUSrSJoCK0MqkIpwTuamJsfp2JZ6fUDYkLhqz7y4Tz8Fg1+5N WMhbkzyVHU61u7qb449vVIbROcHMEWZtm+VmuOcCOgTbBYHn5FI2lcCwf4LbGk0tAM W2XCY/dz5FkWQHxAplv37tNjGPT8d5dKP67mrYKs= Message-ID: <85837c7d-fe6c-4b07-b804-b6d113bab4e6@arm.com> Date: Thu, 14 May 2026 16:26:25 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 10/11] drm/panthor: Use the irqsave variant of spin_lock in panthor_gpu_irq_handler() To: Boris Brezillon , Liviu Dudau Cc: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org References: <20260512-panthor-signal-from-irq-v2-0-95c614a739cb@collabora.com> <20260512-panthor-signal-from-irq-v2-10-95c614a739cb@collabora.com> From: Steven Price Content-Language: en-GB In-Reply-To: <20260512-panthor-signal-from-irq-v2-10-95c614a739cb@collabora.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12/05/2026 12:37, Boris Brezillon wrote: > This is not a bug per-se, because this lock is never taken in an > interrupt context, but it's not consistent with the other users of this > lock. We're also planning on transitioning GPU event processing to > a hard handler. Again, this alone wouldn't justify using the IRQ-safe > variant, because then this _lock/unlock sequence would be in the > hard-IRQ path, where IRQs are already disabled, but let's do it anyway, > to keep things consistent. > > While at it, transition to a guard() instead of a plain lock/unlock > sequence. > > Signed-off-by: Boris Brezillon Reviewed-by: Steven Price Although this now leaves the lock in panthor_pwr_irq_handler() the odd one out... Thanks, Steve > --- > drivers/gpu/drm/panthor/panthor_gpu.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/panthor/panthor_gpu.c b/drivers/gpu/drm/panthor/panthor_gpu.c > index d0be758ea3e1..b9c51f8a051d 100644 > --- a/drivers/gpu/drm/panthor/panthor_gpu.c > +++ b/drivers/gpu/drm/panthor/panthor_gpu.c > @@ -110,12 +110,11 @@ static void panthor_gpu_irq_handler(struct panthor_irq *pirq, u32 status) > if (status & GPU_IRQ_PROTM_FAULT) > drm_warn(&ptdev->base, "GPU Fault in protected mode\n"); > > - spin_lock(&ptdev->gpu->reqs_lock); > + guard(spinlock_irqsave)(&ptdev->gpu->reqs_lock); > if (status & ptdev->gpu->pending_reqs) { > ptdev->gpu->pending_reqs &= ~status; > wake_up_all(&ptdev->gpu->reqs_acked); > } > - spin_unlock(&ptdev->gpu->reqs_lock); > } > > static irqreturn_t panthor_gpu_irq_threaded_handler(int irq, void *data) >