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From: Chanwoo Choi <chanwoo@kernel.org>
To: Sascha Hauer <s.hauer@pengutronix.de>,
	linux-rockchip@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	Heiko Stuebner <heiko@sntech.de>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	MyungJoo Ham <myungjoo.ham@samsung.com>,
	Will Deacon <will@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	kernel@pengutronix.de,
	Michael Riesch <michael.riesch@wolfvision.net>,
	Robin Murphy <robin.murphy@arm.com>,
	Vincent Legoll <vincent.legoll@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	devicetree@vger.kernel.org,
	Sebastian Reichel <sebastian.reichel@collabora.com>
Subject: Re: [PATCH v7 07/26] PM / devfreq: rockchip-dfi: introduce channel mask
Date: Sat, 7 Oct 2023 02:21:10 +0900	[thread overview]
Message-ID: <859b0091-e361-6060-2977-4aba13af418a@kernel.org> (raw)
In-Reply-To: <20230704093242.583575-8-s.hauer@pengutronix.de>

Hi,

On 23. 7. 4. 18:32, Sascha Hauer wrote:
> Different Rockchip SoC variants have a different number of channels.
> Introduce a channel mask to make the number of channels configurable
> from SoC initialization code.
> 
> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---
>  drivers/devfreq/event/rockchip-dfi.c | 23 +++++++++++++++++------
>  1 file changed, 17 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c
> index 126bb744645b6..82de24a027579 100644
> --- a/drivers/devfreq/event/rockchip-dfi.c
> +++ b/drivers/devfreq/event/rockchip-dfi.c
> @@ -18,10 +18,11 @@
>  #include <linux/list.h>
>  #include <linux/of.h>
>  #include <linux/of_device.h>
> +#include <linux/bits.h>
>  
>  #include <soc/rockchip/rk3399_grf.h>
>  
> -#define RK3399_DMC_NUM_CH	2
> +#define DMC_MAX_CHANNELS	2
>  
>  /* DDRMON_CTRL */
>  #define DDRMON_CTRL	0x04
> @@ -44,7 +45,7 @@ struct dmc_count_channel {
>  };
>  
>  struct dmc_count {
> -	struct dmc_count_channel c[RK3399_DMC_NUM_CH];
> +	struct dmc_count_channel c[DMC_MAX_CHANNELS];
>  };
>  
>  /*
> @@ -61,6 +62,7 @@ struct rockchip_dfi {
>  	struct regmap *regmap_pmu;
>  	struct clk *clk;
>  	u32 ddr_type;
> +	unsigned int channel_mask;
>  };
>  
>  static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev)
> @@ -95,7 +97,9 @@ static void rockchip_dfi_read_counters(struct devfreq_event_dev *edev, struct dm
>  	u32 i;
>  	void __iomem *dfi_regs = dfi->regs;
>  
> -	for (i = 0; i < RK3399_DMC_NUM_CH; i++) {
> +	for (i = 0; i < DMC_MAX_CHANNELS; i++) {
> +		if (!(dfi->channel_mask & BIT(i)))
> +			continue;
>  		count->c[i].access = readl_relaxed(dfi_regs +
>  				DDRMON_CH0_DFI_ACCESS_NUM + i * 20);
>  		count->c[i].total = readl_relaxed(dfi_regs +
> @@ -145,9 +149,14 @@ static int rockchip_dfi_get_event(struct devfreq_event_dev *edev,
>  	rockchip_dfi_read_counters(edev, &count);
>  
>  	/* We can only report one channel, so find the busiest one */
> -	for (i = 0; i < RK3399_DMC_NUM_CH; i++) {
> -		u32 a = count.c[i].access - last->c[i].access;
> -		u32 t = count.c[i].total - last->c[i].total;
> +	for (i = 0; i < DMC_MAX_CHANNELS; i++) {

Instead of DMC_MAX_CHANNELS defintion,
you can initialize the max channel in each rkXXXX_dfi_init() like 'dfi->channel_count'.
It reduces the unnecessary loop by initializing the proper max channel.

> +		u32 a, t;
> +
> +		if (!(dfi->channel_mask & BIT(i)))
> +			continue;
> +
> +		a = count.c[i].access - last->c[i].access;
> +		t = count.c[i].total - last->c[i].total;
>  
>  		if (a > access) {
>  			access = a;
> @@ -185,6 +194,8 @@ static int rk3399_dfi_init(struct rockchip_dfi *dfi)
>  	dfi->ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) &
>  			RK3399_PMUGRF_DDRTYPE_MASK;
>  
> +	dfi->channel_mask = GENMASK(1, 0);
> +
>  	return 0;
>  };
>  

-- 
Best Regards,
Samsung Electronics
Chanwoo Choi


  reply	other threads:[~2023-10-06 17:21 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-04  9:32 [PATCH v7 00/26] Add perf support to the rockchip-dfi driver Sascha Hauer
2023-07-04  9:32 ` [PATCH v7 01/26] PM / devfreq: rockchip-dfi: Make pmu regmap mandatory Sascha Hauer
2023-10-06 16:03   ` Chanwoo Choi
2023-07-04  9:32 ` [PATCH v7 02/26] PM / devfreq: rockchip-dfi: Embed desc into private data struct Sascha Hauer
2023-10-06 16:04   ` Chanwoo Choi
2023-07-04  9:32 ` [PATCH v7 03/26] PM / devfreq: rockchip-dfi: use consistent name for " Sascha Hauer
2023-10-06 16:06   ` Chanwoo Choi
2023-07-04  9:32 ` [PATCH v7 04/26] PM / devfreq: rockchip-dfi: Add SoC specific init function Sascha Hauer
2023-10-06 16:22   ` Chanwoo Choi
2023-07-04  9:32 ` [PATCH v7 05/26] PM / devfreq: rockchip-dfi: dfi store raw values in counter struct Sascha Hauer
2023-10-06 16:34   ` Chanwoo Choi
2023-07-04  9:32 ` [PATCH v7 06/26] PM / devfreq: rockchip-dfi: Use free running counter Sascha Hauer
2023-10-06 17:21   ` Chanwoo Choi
2023-07-04  9:32 ` [PATCH v7 07/26] PM / devfreq: rockchip-dfi: introduce channel mask Sascha Hauer
2023-10-06 17:21   ` Chanwoo Choi [this message]
2023-10-16 11:22     ` Sascha Hauer
2023-10-16 12:45       ` Sascha Hauer
2023-10-17  8:28         ` Chanwoo Choi
2023-07-04  9:32 ` [PATCH v7 08/26] PM / devfreq: rk3399_dmc,dfi: generalize DDRTYPE defines Sascha Hauer
2023-10-06 17:43   ` Chanwoo Choi
2023-10-16 13:10     ` Sascha Hauer
2023-07-04  9:32 ` [PATCH v7 09/26] PM / devfreq: rockchip-dfi: Clean up DDR type register defines Sascha Hauer
2023-10-06 19:11   ` Chanwoo Choi
2023-10-16 12:03     ` Sascha Hauer
2023-10-17  8:34       ` Chanwoo Choi
2023-07-04  9:32 ` [PATCH v7 10/26] PM / devfreq: rockchip-dfi: Add RK3568 support Sascha Hauer
2023-10-06 18:17   ` Chanwoo Choi
2023-10-16 11:34     ` Sascha Hauer
2023-10-17  8:31       ` Chanwoo Choi
2023-07-04  9:32 ` [PATCH v7 11/26] PM / devfreq: rockchip-dfi: Handle LPDDR2 correctly Sascha Hauer
2023-10-06 18:24   ` Chanwoo Choi
2023-07-04  9:32 ` [PATCH v7 12/26] PM / devfreq: rockchip-dfi: Handle LPDDR4X Sascha Hauer
2023-10-06 18:26   ` Chanwoo Choi
2023-07-04  9:32 ` [PATCH v7 13/26] PM / devfreq: rockchip-dfi: Pass private data struct to internal functions Sascha Hauer
2023-10-06 18:28   ` Chanwoo Choi
2023-07-04  9:32 ` [PATCH v7 14/26] PM / devfreq: rockchip-dfi: Prepare for multiple users Sascha Hauer
2023-10-06 18:46   ` Chanwoo Choi
2023-07-04  9:32 ` [PATCH v7 15/26] PM / devfreq: rockchip-dfi: give variable a better name Sascha Hauer
2023-10-06 18:37   ` Chanwoo Choi
2023-07-04  9:32 ` [PATCH v7 16/26] PM / devfreq: rockchip-dfi: Add perf support Sascha Hauer
2023-10-08 21:48   ` Chanwoo Choi
2023-10-16 12:16     ` Sascha Hauer
2023-10-17  8:35       ` Chanwoo Choi
2023-07-04  9:32 ` [PATCH v7 17/26] PM / devfreq: rockchip-dfi: make register stride SoC specific Sascha Hauer
2023-10-08 21:57   ` Chanwoo Choi
2023-07-04  9:32 ` [PATCH v7 18/26] PM / devfreq: rockchip-dfi: account for multiple DDRMON_CTRL registers Sascha Hauer
2023-10-08 22:19   ` Chanwoo Choi
2023-10-16 12:49     ` Sascha Hauer
2023-10-17  8:35       ` Chanwoo Choi
2023-07-04  9:32 ` [PATCH v7 19/26] PM / devfreq: rockchip-dfi: add support for RK3588 Sascha Hauer
2023-10-08 22:22   ` Chanwoo Choi
2023-07-04  9:32 ` [PATCH v7 20/26] dt-bindings: devfreq: event: convert Rockchip DFI binding to yaml Sascha Hauer
2023-10-09  0:40   ` Chanwoo Choi
2023-07-04  9:32 ` [PATCH v7 21/26] dt-bindings: devfreq: event: rockchip,dfi: Add rk3568 support Sascha Hauer
2023-10-08 22:24   ` Chanwoo Choi
2023-07-04  9:32 ` [PATCH v7 22/26] dt-bindings: devfreq: event: rockchip,dfi: Add rk3588 support Sascha Hauer
2023-10-08 22:24   ` Chanwoo Choi
2023-07-04  9:32 ` [PATCH v7 23/26] dt-bindings: soc: rockchip: grf: add rockchip,rk3588-pmugrf Sascha Hauer
2023-07-04  9:32 ` [PATCH v7 24/26] arm64: dts: rockchip: rk3399: Enable DFI Sascha Hauer
2023-07-04  9:32 ` [PATCH v7 25/26] arm64: dts: rockchip: rk356x: Add DFI Sascha Hauer
2023-07-04  9:32 ` [PATCH v7 26/26] arm64: dts: rockchip: rk3588s: " Sascha Hauer

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