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From: Nikunj A Dadhania <nikunj@amd.com>
To: Jim Mattson <jmattson@google.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>, <x86@kernel.org>,
	"H. Peter Anvin" <hpa@zytor.com>,
	Sean Christopherson <seanjc@google.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Pawan Gupta <pawan.kumar.gupta@linux.intel.com>,
	"Tom Lendacky" <thomas.lendacky@amd.com>,
	Jim Mattson <jmattson@google.com>,
	"Perry Yuan" <perry.yuan@amd.com>,
	Sohil Mehta <sohil.mehta@intel.com>,
	"Xin Li (Intel)" <xin@zytor.com>,
	Joerg Roedel <joerg.roedel@amd.com>, Avi Kivity <avi@redhat.com>,
	<linux-kernel@vger.kernel.org>, <kvm@vger.kernel.org>,
	Yosry Ahmed <yosry.ahmed@linux.dev>
Subject: Re: [PATCH v2 1/2] KVM: x86: Advertise EferLmsleUnsupported to userspace
Date: Tue, 7 Oct 2025 07:59:14 +0000	[thread overview]
Message-ID: <85qzvfqh0t.fsf@amd.com> (raw)
In-Reply-To: <20251001001529.1119031-2-jmattson@google.com>

Jim Mattson <jmattson@google.com> writes:

> CPUID.80000008H:EBX.EferLmsleUnsupported[bit 20] is a defeature
> bit. When this bit is clear, EFER.LMSLE is supported. When this bit is
> set, EFER.LMLSE is unsupported. KVM has never supported EFER.LMSLE, so
> it cannot support a 0-setting of this bit.
>
> Pass through the bit in KVM_GET_SUPPORTED_CPUID to advertise the
> unavailability of EFER.LMSLE to userspace.
>
> Signed-off-by: Jim Mattson <jmattson@google.com>

Reviewed-by: Nikunj A Dadhania <nikunj@amd.com>

> ---
>  v1 -> v2:
>    Pass through the bit from hardware, rather than forcing it to be set.
>
>  arch/x86/include/asm/cpufeatures.h | 1 +
>  arch/x86/kvm/cpuid.c               | 1 +
>  2 files changed, 2 insertions(+)
>
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index 751ca35386b0..f9b593721917 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -338,6 +338,7 @@
>  #define X86_FEATURE_AMD_STIBP		(13*32+15) /* Single Thread Indirect Branch Predictors */
>  #define X86_FEATURE_AMD_STIBP_ALWAYS_ON	(13*32+17) /* Single Thread Indirect Branch Predictors always-on preferred */
>  #define X86_FEATURE_AMD_IBRS_SAME_MODE	(13*32+19) /* Indirect Branch Restricted Speculation same mode protection*/
> +#define X86_FEATURE_EFER_LMSLE_MBZ	(13*32+20) /* EFER.LMSLE must be zero */
>  #define X86_FEATURE_AMD_PPIN		(13*32+23) /* "amd_ppin" Protected Processor Inventory Number */
>  #define X86_FEATURE_AMD_SSBD		(13*32+24) /* Speculative Store Bypass Disable */
>  #define X86_FEATURE_VIRT_SSBD		(13*32+25) /* "virt_ssbd" Virtualized Speculative Store Bypass Disable */
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index e2836a255b16..4823970611fd 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -1096,6 +1096,7 @@ void kvm_set_cpu_caps(void)
>  		F(AMD_STIBP),
>  		F(AMD_STIBP_ALWAYS_ON),
>  		F(AMD_IBRS_SAME_MODE),
> +		F(EFER_LMSLE_MBZ),
>  		F(AMD_PSFD),
>  		F(AMD_IBPB_RET),
>  	);
> -- 
> 2.51.0.618.g983fd99d29-goog

  parent reply	other threads:[~2025-10-07  7:59 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-01  0:14 [PATCH v2 0/2] KVM: SVM: Handle EferLmsleUnsupported Jim Mattson
2025-10-01  0:14 ` [PATCH v2 1/2] KVM: x86: Advertise EferLmsleUnsupported to userspace Jim Mattson
2025-10-01 15:17   ` Yosry Ahmed
2025-10-07  7:59   ` Nikunj A Dadhania [this message]
2025-10-14 22:49   ` Sean Christopherson
2025-10-01  0:14 ` [PATCH v2 2/2] KVM: SVM: Disallow EFER.LMSLE when not supported by hardware Jim Mattson
2025-10-01 15:18   ` Yosry Ahmed
2025-10-01 15:25   ` Yosry Ahmed
2025-10-07  8:02   ` Nikunj A Dadhania
2025-10-20 16:33 ` [PATCH v2 0/2] KVM: SVM: Handle EferLmsleUnsupported Sean Christopherson

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