From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D3A462F546D; Wed, 1 Apr 2026 14:55:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775055316; cv=none; b=BPhZspltY4iTyxsoJ2o8Yox74oFQld3uLhzZ2j4JOAYyrcwaBcXzEOgmpDzBJEGV2c0oyYiid57eqkIKX9hxyEcbZ2EhVmak84RB2Cscn33iiv36GzxslMaEOIlLB7zpPSu8NbXtZig7E/3cYoIJnNQP1xvNSm06kzVOLPA221k= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775055316; c=relaxed/simple; bh=VeR08XCObrTVrJHc8UD63osOnrnssAf50udSK2lVMCQ=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=DbWs4fMRmrzjgYW3smWeNJxoO0HFQO/LGJQGZKZwbab1/IOohVsp7H41ZA/WcupoyFW+gbexPBDejUQx2UXv/7gsdXNVQreUIZVAvmC1rgfoKe0o9gF13lbAWH5RjygLumMb0q5KyCaHnfotXxDkgmTNGP19ByLRLHQtHCMOzlY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=JT31f108; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="JT31f108" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 73DC2C4CEF7; Wed, 1 Apr 2026 14:55:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1775055316; bh=VeR08XCObrTVrJHc8UD63osOnrnssAf50udSK2lVMCQ=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=JT31f108PEDGpAmUUv3qK7QKsPxQBFR/4aAF5ywGzAbFiEcX7F99CEBLLCekqNxE5 ftTQx8TI8axXSgmUxhgNWRB0igLuN5GUjnBwyYGNum4Pq7pEUNqR/0nkG+mvFG9ZVI x5VqWOdLegcw8SBruOJ6aRIt/kYEeIIjh+YInRj5bDoYXk4tE9az5UlSmz1RAmgMq3 G/tQhEmkXbORfeoSXvtF/KoP5RDMUhFf+pNsLMGviaxAhwVelm1Li1RMVP1xbo6o/d Yqn3OYqQgMb9LIjPEFikXLQ9lhnQjgqsTpnYxMn7x/UNNJs1vyUJlhwm5Qr2OnnxqV YkQRHPfiTDB1A== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1w7wyO-00000007uLn-0OWp; Wed, 01 Apr 2026 14:55:12 +0000 Date: Wed, 01 Apr 2026 15:55:11 +0100 Message-ID: <86341e4to0.wl-maz@kernel.org> From: Marc Zyngier To: Sebastian Ene Cc: catalin.marinas@arm.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, android-kvm@google.com, joey.gouly@arm.com, korneld@google.com, mrigendra.chaubey@gmail.com, oupton@kernel.org, perlarsen@google.com, suzuki.poulose@arm.com, will@kernel.org, yuzenghui@huawei.com Subject: Re: [PATCH] KVM: arm64: Pass a 64bit function-id in the SMC handlers In-Reply-To: <20260401123201.389906-1-sebastianene@google.com> References: <20260401123201.389906-1-sebastianene@google.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: sebastianene@google.com, catalin.marinas@arm.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, android-kvm@google.com, joey.gouly@arm.com, korneld@google.com, mrigendra.chaubey@gmail.com, oupton@kernel.org, perlarsen@google.com, suzuki.poulose@arm.com, will@kernel.org, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Wed, 01 Apr 2026 13:32:01 +0100, Sebastian Ene wrote: > > Make the SMC handlers accept a 64bit value for the function-id to keep > it uniform with the rest of the code and prevent a u64 -> u32 -> u64 > conversion as it currently happens when we handle PSCI. That seems overly creative. The spec says (2.5, from ARM DEN 0028 1.6 G): "The Function Identifier is passed on W0 on every SMC and HVC call. Its 32-bit integer value indicates which function is being requested by the caller. It is always passed as the first argument to every SMC or HVC call in R0 or W0." which indicates that it is *always* a 32bit value. So if you have a 64bit value somewhere, *that* should be fixed, not propagated arbitrarily. Thanks, M. -- Without deviation from the norm, progress is not possible.