From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25053C83F1C for ; Mon, 28 Aug 2023 10:17:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230419AbjH1KR2 (ORCPT ); Mon, 28 Aug 2023 06:17:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35462 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230518AbjH1KRW (ORCPT ); Mon, 28 Aug 2023 06:17:22 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6B18EC1 for ; Mon, 28 Aug 2023 03:17:07 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 009836372F for ; Mon, 28 Aug 2023 10:17:07 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 64594C433CA; Mon, 28 Aug 2023 10:17:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1693217826; bh=CeKeHSTMzNc50yYlK2+uOzJKtFWxj9Evf/ESC1wFZGs=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=Oth+1yyjrDx4tdYm9UTwTs6EnqjkIa0UzGO/Vba3OCJfoX8urgU7x7ue4yfGTvCZz LcH4MhKov9C3SDJu22I+KgFX9eO1skPKRUY+aMyLFWlNSOLPUUXwwWwGmF/kN5buFf CDrYPFkuKeN2i1JEwyeKE4ew0+tMjrwqSJxp8nUm+p+e8h/Y5Ai4ob35UFd3Sdrw9R Au2S8ak2g5dIy29BpZXTAtp7eGdoTpMaqcIfboI54lr0XHKlG8t0hE9StBG0JW6DsF nqfX6zNCJxvLjNkkVKmKlEQfvKdFIFBpFxO5SHnb7WMzo2/4BI9dQdjBaMZn5IQ6b1 AVCs3shRLwGwQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1qaZIt-008ghc-Rv; Mon, 28 Aug 2023 11:17:03 +0100 Date: Mon, 28 Aug 2023 11:17:03 +0100 Message-ID: <864jkjfp40.wl-maz@kernel.org> From: Marc Zyngier To: Ganapatrao Kulkarni Cc: linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, eauger@redhat.com, miguel.luis@oracle.com, darren@os.amperecomputing.com, scott@os.amperecomputing.com, Christoffer Dall Subject: Re: [PATCH 2/2] KVM: arm64: timers: Adjust CVAL of a ptimer across guest entry and exits In-Reply-To: <80bce164-4fb9-0126-0ba0-02581be1a0a5@os.amperecomputing.com> References: <20230817060314.535987-1-gankulkarni@os.amperecomputing.com> <20230817060314.535987-3-gankulkarni@os.amperecomputing.com> <87bkf6oyyt.wl-maz@kernel.org> <0c5fb304-8c69-80c3-6f1e-487828554244@os.amperecomputing.com> <86il97ff17.wl-maz@kernel.org> <946b0fc2-3264-d7ab-f5e1-7c9e76db6ebf@os.amperecomputing.com> <80bce164-4fb9-0126-0ba0-02581be1a0a5@os.amperecomputing.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: gankulkarni@os.amperecomputing.com, linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, eauger@redhat.com, miguel.luis@oracle.com, darren@os.amperecomputing.com, scott@os.amperecomputing.com, Christoffer.Dall@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 24 Aug 2023 07:37:42 +0100, Ganapatrao Kulkarni wrote: > > >> Now, to the actual patch: I think the way you offset CVAL isn't > >> great. You should never have to change it on entry, and you should > >> instead read the correct value from memory. Then, save/restore of CVAL > >> must be amended to always apply the offset. Can you give the hack > >> below a go on your HW? > > I tried this and seems not working, this is due to timer save/restore > are not called for some of the kvm_exit and entry paths(lighter > switches). Can you point me to such paths? Are you referring to the ECV handling of the physical timer registers? > > I tried changing this patch like, Removed cval adjust from the > kvm_entry and still cval is adjusted on kvm_exit and in > timer_restore_state function, reduced cval by offset. > > Please let me know, if this is not you intended to try? > If possible, please share the steps or pseudo code. What I want to get to is that: - on entry (TGE having been flipped to 0), the guest's CVAL is always reload from memory, because that's the absolute reference. We should never load anything else on the CPU. - on exit (TGE having been flipped to 1), the guest's CVAL is stored as the one true value to memory, and the CPU's view is offset by the offset. - the high-level save/restore helpers apply the offsets back and forth as if CNTPOFF didn't exist (because that's exactly the case if TGE=1). Now, I'm pretty sure I'm still missing something, but the above is roughly the scheme I'm trying to follow? Thanks, M. -- Without deviation from the norm, progress is not possible.