From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 640CE14A619 for ; Fri, 1 May 2026 13:17:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777641432; cv=none; b=HjfpCzjoEat+Hwxz0c9dwyGYKwjRBRyH0yHT20rsc58JKcAC7si5/Y6GLHNUXSD4iYs3EmUIplOend9uGyyz6ZXELNYzFqyHw7iTEVFdEm8VBTymr21psgKplkoJIMmU7vztqD4msV9Jt7VIy1zeBFKLib9XalqqhdbzfwIvlxQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777641432; c=relaxed/simple; bh=+6Y2Jt697opHfhpyzFyoznIECuuF7lJeYmJk09Hwors=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=toYRQmbI8/DAN3yzDFxOS9Vr2scYCfmF4NqvU78aT8hf8ULhjl5BtqYJcbAwamnDS08s7E2NhGVhV4iPNxgzuZ6fiMrSwIdzFJffAuqwzPYe0YvqW+e0WKqJ1ZbpaS2Bu6umv9rIdP4qcnUlQW0otJHCWvqx2ZIIXQTW0hhuJzc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=YeOQZ/+0; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="YeOQZ/+0" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 57DB2176B; Fri, 1 May 2026 06:17:04 -0700 (PDT) Received: from [10.1.29.19] (e122027.cambridge.arm.com [10.1.29.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E6B023F62B; Fri, 1 May 2026 06:17:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1777641429; bh=+6Y2Jt697opHfhpyzFyoznIECuuF7lJeYmJk09Hwors=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=YeOQZ/+0qp1mnokm1I0NS1n6tUMUnuMu/vHW1hf7EpqT32QVBH5VIJslKyCzAz3Tt Dxr2wDhJCbBg4sbLXzAytioZxnR4OoGow1Nj651yWUKvHOJSk+VLHFB1zeWZEmauMU gGoLYMCR43idjYAP+SIlUPblLCP3QeSxHFT8GS18= Message-ID: <866fc796-046c-4d6d-b96f-6683daafa6be@arm.com> Date: Fri, 1 May 2026 14:17:05 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 01/10] drm/panthor: Make panthor_irq::state a non-atomic field To: Boris Brezillon , Liviu Dudau Cc: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org References: <20260429-panthor-signal-from-irq-v1-0-4b92ae4142d2@collabora.com> <20260429-panthor-signal-from-irq-v1-1-4b92ae4142d2@collabora.com> From: Steven Price Content-Language: en-GB In-Reply-To: <20260429-panthor-signal-from-irq-v1-1-4b92ae4142d2@collabora.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 29/04/2026 10:38, Boris Brezillon wrote: > The only place where panthor_irq::state is accessed without > panthor_irq::mask_lock held is in the prologue of _irq_suspend(), > which is not really a fast-path. So let's simplify things by assuming > panthor_irq::state must always be accessed with the mask_lock held, > and add a scoped_guard() in _irq_suspend(). > > Signed-off-by: Boris Brezillon Reviewed-by: Steven Price > --- > drivers/gpu/drm/panthor/panthor_device.h | 35 ++++++++++++++++---------------- > 1 file changed, 17 insertions(+), 18 deletions(-) > > diff --git a/drivers/gpu/drm/panthor/panthor_device.h b/drivers/gpu/drm/panthor/panthor_device.h > index 4e4607bca7cc..3f91ba73829d 100644 > --- a/drivers/gpu/drm/panthor/panthor_device.h > +++ b/drivers/gpu/drm/panthor/panthor_device.h > @@ -101,8 +101,12 @@ struct panthor_irq { > */ > spinlock_t mask_lock; > > - /** @state: one of &enum panthor_irq_state reflecting the current state. */ > - atomic_t state; > + /** > + * @state: one of &enum panthor_irq_state reflecting the current state. > + * > + * Must be accessed with mask_lock held. > + */ > + enum panthor_irq_state state; > }; > > /** > @@ -510,18 +514,15 @@ const char *panthor_exception_name(struct panthor_device *ptdev, > static irqreturn_t panthor_ ## __name ## _irq_raw_handler(int irq, void *data) \ > { \ > struct panthor_irq *pirq = data; \ > - enum panthor_irq_state old_state; \ > \ > if (!gpu_read(pirq->iomem, INT_STAT)) \ > return IRQ_NONE; \ > \ > guard(spinlock_irqsave)(&pirq->mask_lock); \ > - old_state = atomic_cmpxchg(&pirq->state, \ > - PANTHOR_IRQ_STATE_ACTIVE, \ > - PANTHOR_IRQ_STATE_PROCESSING); \ > - if (old_state != PANTHOR_IRQ_STATE_ACTIVE) \ > + if (pirq->state != PANTHOR_IRQ_STATE_ACTIVE) \ > return IRQ_NONE; \ > \ > + pirq->state = PANTHOR_IRQ_STATE_PROCESSING; \ > gpu_write(pirq->iomem, INT_MASK, 0); \ > return IRQ_WAKE_THREAD; \ > } \ > @@ -551,13 +552,10 @@ static irqreturn_t panthor_ ## __name ## _irq_threaded_handler(int irq, void *da > } \ > \ > scoped_guard(spinlock_irqsave, &pirq->mask_lock) { \ > - enum panthor_irq_state old_state; \ > - \ > - old_state = atomic_cmpxchg(&pirq->state, \ > - PANTHOR_IRQ_STATE_PROCESSING, \ > - PANTHOR_IRQ_STATE_ACTIVE); \ > - if (old_state == PANTHOR_IRQ_STATE_PROCESSING) \ > + if (pirq->state == PANTHOR_IRQ_STATE_PROCESSING) { \ > + pirq->state = PANTHOR_IRQ_STATE_ACTIVE; \ > gpu_write(pirq->iomem, INT_MASK, pirq->mask); \ > + } \ > } \ > \ > return ret; \ > @@ -566,18 +564,19 @@ static irqreturn_t panthor_ ## __name ## _irq_threaded_handler(int irq, void *da > static inline void panthor_ ## __name ## _irq_suspend(struct panthor_irq *pirq) \ > { \ > scoped_guard(spinlock_irqsave, &pirq->mask_lock) { \ > - atomic_set(&pirq->state, PANTHOR_IRQ_STATE_SUSPENDING); \ > + pirq->state = PANTHOR_IRQ_STATE_SUSPENDING; \ > gpu_write(pirq->iomem, INT_MASK, 0); \ > } \ > synchronize_irq(pirq->irq); \ > - atomic_set(&pirq->state, PANTHOR_IRQ_STATE_SUSPENDED); \ > + scoped_guard(spinlock_irqsave, &pirq->mask_lock) \ > + pirq->state = PANTHOR_IRQ_STATE_SUSPENDED; \ > } \ > \ > static inline void panthor_ ## __name ## _irq_resume(struct panthor_irq *pirq) \ > { \ > guard(spinlock_irqsave)(&pirq->mask_lock); \ > \ > - atomic_set(&pirq->state, PANTHOR_IRQ_STATE_ACTIVE); \ > + pirq->state = PANTHOR_IRQ_STATE_ACTIVE; \ > gpu_write(pirq->iomem, INT_CLEAR, pirq->mask); \ > gpu_write(pirq->iomem, INT_MASK, pirq->mask); \ > } \ > @@ -610,7 +609,7 @@ static inline void panthor_ ## __name ## _irq_enable_events(struct panthor_irq * > * on the PROCESSING -> ACTIVE transition. \ > * If the IRQ is suspended/suspending, the mask is restored at resume time. \ > */ \ > - if (atomic_read(&pirq->state) == PANTHOR_IRQ_STATE_ACTIVE) \ > + if (pirq->state == PANTHOR_IRQ_STATE_ACTIVE) \ > gpu_write(pirq->iomem, INT_MASK, pirq->mask); \ > } \ > \ > @@ -624,7 +623,7 @@ static inline void panthor_ ## __name ## _irq_disable_events(struct panthor_irq > * on the PROCESSING -> ACTIVE transition. \ > * If the IRQ is suspended/suspending, the mask is restored at resume time. \ > */ \ > - if (atomic_read(&pirq->state) == PANTHOR_IRQ_STATE_ACTIVE) \ > + if (pirq->state == PANTHOR_IRQ_STATE_ACTIVE) \ > gpu_write(pirq->iomem, INT_MASK, pirq->mask); \ > } > >