From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BBC52C282C3 for ; Tue, 22 Jan 2019 11:40:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9216020879 for ; Tue, 22 Jan 2019 11:40:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728290AbfAVLkd (ORCPT ); Tue, 22 Jan 2019 06:40:33 -0500 Received: from foss.arm.com ([217.140.101.70]:51742 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728053AbfAVLkd (ORCPT ); Tue, 22 Jan 2019 06:40:33 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0DA8DA78; Tue, 22 Jan 2019 03:40:33 -0800 (PST) Received: from big-swifty.misterjones.org (big-swifty.copenhagen.arm.com [10.32.148.139]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B3DEE3F6A8; Tue, 22 Jan 2019 03:40:25 -0800 (PST) Date: Tue, 22 Jan 2019 11:40:17 +0000 Message-ID: <867eewapjy.wl-marc.zyngier@arm.com> From: Marc Zyngier To: Aisheng Dong Cc: "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "shawnguo@kernel.org" , dl-linux-imx , "l.stach@pengutronix.de" , Thomas Gleixner , Jason Cooper , Andrey Smirnov Subject: Re: [PATCH 1/1] irqchip: gpcv2: make config option visible In-Reply-To: References: <1547796918-29790-1-git-send-email-aisheng.dong@nxp.com> <25cd3e29-e365-f0d4-65a3-b3af69acd9cd@arm.com> <77ecfcfa-16fe-a3e2-3d6b-90cdf999b316@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.8 EasyPG/1.0.0 Emacs/25.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Organization: ARM Ltd MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 22 Jan 2019 11:04:48 +0000, Aisheng Dong wrote: > > > > > From: Marc Zyngier [mailto:marc.zyngier@arm.com] > > Sent: Friday, January 18, 2019 6:10 PM > [...] > > >>> > > >>> config IMX_GPCV2 > > >>> - bool > > >>> + bool "i.MX GPCv2 IRQ chip" > > >>> + depends on ARCH_MXC || (COMPILE_TEST && OF) > > >>> select IRQ_DOMAIN > > >>> help > > >>> Enables the wakeup IRQs for IMX platforms with GPCv2 block > > >>> > > >> > > >> How does it help exactly? It is pretty difficult for a user to know > > >> exactly what they need. I'd rather see it selected by ARCH_MXC, which > > >> makes it > > > > > > ARM64 SoC maintainers suggest not add more driver specific options > > > except an Generic ARCH option. > > > > > > As GPCv2 is also used in MX8MQ. So we may select it in armv8 defconfig. > > > If this option is invisible, we can't select it. > > > > And conversely, users have no idea of what letter soup they have to select to > > make their HW work properly. Selecting the driver when the platform is > > supposed to be supported is the right way to solve this problem. > > > > I think the problem is that we have no platform specific CONFIGs for arm v8 platforms. > We have only one CONFIG_ARCH_MXC for all MX8 SoCs, e.g. mx8qxp, mx8mq... > Only MX8MQ needs to use GPCv2. Selecting GPCv2 under ARCH_MXC means users > have no chance to disable it for mx8qxp which does not need it. And where is the problem to select this on platforms that do not strictly require it? Code bloat? If you want fine grained selection for people dealing with a single SoC, make it depend on CONFIG_EXPERT. Don't force this on unsuspecting users who expect their HW to just work. Something like: config IMX_GPCV2 bool "i.MX GPCv2 IRQ chip" if EXPERT def_bool ARCH_MXC select IRQ_DOMAIN help Enables the wakeup IRQs for IMX platforms with GPCv2 block > > We probably could introduce SOC option under drivers/soc/ to do the default configs > selection. But we've already handled all other driver selections in defconfig > e.g. firmware, clk, pinctrl, power domain and etc. > Not sure whether GPCv2 should be an exception. I think something like the above should be the rule. Configuration feature creep is not helping anyone. M. -- Jazz is not dead, it just smell funny.