Re: Linux 2.6.27-rc5: System boot regression caused by commit a2bd7274b47124d2fc4dfdb8c0591f545ba749dd

["Yinghai Lu" <yhlu.kernel@gmail.com>]

On Sat, Aug 30, 2008 at 4:28 PM, Linus Torvalds
<torvalds@linux-foundation.org> wrote:
>
>
> On Sat, 30 Aug 2008, Yinghai Lu wrote:
>>
>> wait, THAT BAR is 64BIT capable, So kernel should assign 64bit range to it...
>> it request_resource fails...
>
> I don't think we've ever done new allocations in 64 bits. Although looking
> for it, I have to admit that I don't see what would limit us right now.
> There used to be some paths that weren't 64-bit clean, but I think we
> fixed all of those.

would be some corner case...

didn't see anything there.

calling  pcibios_assign_resources+0x0/0x90
request_resource: root: (PCI Bus 0000:01) [fe700000, fe7fffff], new:
(0000:01:00.0) [fe7c0000, fe7dffff] conflict 0
request_resource: root: (PCI Bus 0000:03) [fe900000, fe9fffff], new:
(0000:03:00.0) [fe9c0000, fe9dffff] conflict 0
pci 0000:00:02.0: PCI bridge, secondary bus 0000:01
pci 0000:00:02.0:   IO window: 0x9000-0x9fff
pci 0000:00:02.0:   MEM window: 0xfe700000-0xfe7fffff
pci 0000:00:02.0:   PREFETCH window: 0x000000d8000000-0x000000dfffffff
pci 0000:00:04.0: PCI bridge, secondary bus 0000:02
pci 0000:00:04.0:   IO window: 0xa000-0xbfff
pci 0000:00:04.0:   MEM window: 0xfe800000-0xfe8fffff
pci 0000:00:04.0:   PREFETCH window: disabled
pci 0000:00:06.0: PCI bridge, secondary bus 0000:03
pci 0000:00:06.0:   IO window: 0xc000-0xcfff
pci 0000:00:06.0:   MEM window: 0xfe900000-0xfe9fffff
pci 0000:00:06.0:   PREFETCH window: disabled
pci 0000:00:07.0: PCI bridge, secondary bus 0000:04
pci 0000:00:07.0:   IO window: 0xd000-0xefff
pci 0000:00:07.0:   MEM window: 0xfea00000-0xfeafffff
pci 0000:00:07.0:   PREFETCH window: disabled
pci 0000:00:14.4: PCI bridge, secondary bus 0000:05
pci 0000:00:14.4:   IO window: disabled
pci 0000:00:14.4:   MEM window: 0xfeb00000-0xfebfffff
pci 0000:00:14.4:   PREFETCH window: disabled
pci 0000:00:02.0: setting latency timer to 64
pci 0000:00:04.0: setting latency timer to 64
pci 0000:00:06.0: setting latency timer to 64
pci 0000:00:07.0: setting latency timer to 64

YH