From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A5E4F381B0E for ; Fri, 19 Jun 2026 14:26:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781879185; cv=none; b=iQ2nGkvI1tmyjZKDcilAyAGvzylzYq69ozg0lxVOQk/+uNEPnQMTxjMILnVxPfbC/picQndy0NPq2o6s4yTOcP5kE9g2bR9d0FaMFCAGNcMlQU1vAT56KLW0JXrFKQal+aYP0Giu8Fz55r9D9wKHdS4FhDB1dLmbbT7wXkMFZek= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781879185; c=relaxed/simple; bh=3ntZaCABO3l1lixXaT0jBmBy4Lh22lVWSuIsIoaEhRg=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=WIvM23jG8ObNtirDVS4vc8eF0lMGfYAYi4WD+kL22+Uo9eKaBcMi/0tTTNIcWK4MU54tMSdgxRUPAS6j2KYMtZmtd9/kVDJA+ikIFAkrMbGJPCTcvFmAQDsmfu3+wHAYEYnOSczNbkVSE9UsoURWSy0hEHXi5xRdC5DTyP0O2b0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=YXg9rxdy; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="YXg9rxdy" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 352EC1F000E9; Fri, 19 Jun 2026 14:26:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1781879184; bh=bQopk2nLC00ieCYyPypfM07LSfdvG93z8e3u+EoauY8=; h=Date:From:To:Cc:Subject:In-Reply-To:References; b=YXg9rxdyQw5KhPv6Z1WHhF9Hn/vGFplna790SFlA8QGz4ka1fL5KHiuhdI5GmuwYw z0lvQ6efm3WvTHRAhJFaE1TzyDwd1ZghWqYHl1N3wXeLlLK5uj/NdKCe6Jcbi90wMk Xt3ixNHnCM/CPjvE1OWFPLKw+SE+Reg3cp1rXRQapdTEuOTnI0yvDwG2rwpt+HkO1h eslzCZdWHV9nbrhdz5oYeiJpPK/rRBhDeKe/uB2GGOCo9N3zcNatu572qaO//xt5y8 y9FdvPrfYlT7Ib/s3WdinN4eWuCdOqexggGwmBz5IzVNsEaodLO525HxcIE4Hzeokg DzmXG8dTcsnGA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1waaAn-0000000ELL4-2qrx; Fri, 19 Jun 2026 14:26:21 +0000 Date: Fri, 19 Jun 2026 15:26:21 +0100 Message-ID: <868q8asj1u.wl-maz@kernel.org> From: Marc Zyngier To: Catalin Marinas Cc: Kiryl Shutsemau , Will Deacon , James Morse , Mark Rutland , Doug Anderson , Petr Mladek , Thomas Gleixner , Andrew Morton , Baoquan He , Puranjay Mohan , Usama Arif , Breno Leitao , Julien Thierry , Lecopzer Chen , Sumit Garg , kernel-team@meta.com, kexec@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, "Kiryl Shutsemau (Meta)" Subject: Re: [PATCH v4 0/4] arm64: cross-CPU NMI via SDEI In-Reply-To: References: User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: catalin.marinas@arm.com, kirill@shutemov.name, will@kernel.org, james.morse@arm.com, mark.rutland@arm.com, dianders@chromium.org, pmladek@suse.com, tglx@linutronix.de, akpm@linux-foundation.org, bhe@redhat.com, puranjay@kernel.org, usama.arif@linux.dev, leitao@debian.org, julien.thierry.kdev@gmail.com, lecopzer@gmail.com, sumit.garg@kernel.org, kernel-team@meta.com, kexec@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kas@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Fri, 19 Jun 2026 15:00:26 +0100, Catalin Marinas wrote: > > Hi Kiryl, > > On Wed, Jun 17, 2026 at 08:20:01PM +0100, Kiryl Shutsemau wrote: > > - GICv3 pseudo-NMI (interrupt priority masking). Its cost is on the > > interrupt mask/unmask hot path: local_irq_enable() becomes an > > ICC_PMR_EL1 write plus a synchronising barrier, and exception > > entry/exit save and restore the PMR, paid on every CPU whether or not > > an NMI is ever delivered. In our measurements, enabling pseudo-NMI > > costs up to ~5% on real workloads, and ~66% on a syscall-in-a-loop > > microbenchmark. A fleet-wide ~5% regression is not acceptable, so > > these systems run with pseudo-NMI disabled. > > Does your firmware set ICC_CTLR_EL1.PMHE? I'd be curious to see the > numbers if the DSB was omitted on the enable path. I certainly don't observe this sort of overhead on the HW I have access to, and would like to understand where this is coming from with actual profiling data. M. -- Without deviation from the norm, progress is not possible.