From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D641D23E334 for ; Thu, 16 Apr 2026 06:42:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776321737; cv=none; b=jzY1AO+alBsPIX7PUqnHl+rNd7EuAojnnASxyj074V7EmfinK4kVA/Wr0/Oq0XF4fJmH1guFMgx/8PAPB1n56auy1v8ZXIvXFWHRw37V36azQ4c5RNMbc7IZAQJkL7flHIFk9f35YHZ9XP8BTfyZgpjIiHmkkSHjFhOBaA/YLDw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776321737; c=relaxed/simple; bh=11cXnqD9GuL+mka2cp1BbcZk3peWIaUxxgMncaij/+s=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=dMb6rRjhLipcymr+8epW8c6DB5fTB/tBpYcgC9FruF23i0ZQhTgXytqtbSmQ1zZ66GZblFpTp9sa+g1m3rfvRCT25EJbeHLRoijDpYaT/aVEinRM2N5ZHGhpFEsHqWKDY1uQGC1DXzfcf2ESIcIPakqffDTU3F5WfE066EAXYeY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=PLKp00Zr; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="PLKp00Zr" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6A545C2BCAF; Thu, 16 Apr 2026 06:42:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1776321737; bh=11cXnqD9GuL+mka2cp1BbcZk3peWIaUxxgMncaij/+s=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=PLKp00Zr5dadzQFoljLd6Cm9omkmkvx6d9k0rj403CsyzaqWMLTU04dYM8P8WLeHr 9D1jEbYpRjhevYoQ+GM3OmCYn0GHLOpZQ0u7XRh9qTT1Ltk+myc37kDDIpA9hFgJae SqC6TbNf3PMXrgGbGfNxAs9kMzfjvVko60yPvNa5C/cLm+yAJcUhizLRKIP3YqMl9G TVaNF+oJPo6E7IlSAdpOmzNgH5MmNp1GWNDFGxRPFSi0qxtfBPUQanaaHCABAJ/FiA vMtsIhEsuRf6aDOwBGvB2WZhkslxWgrXHLJUWm0jVE3ZLSpqJ7iuijdYqCN8m2bkci mnsKpVd0XI5gg== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wDGQZ-0000000C3cH-0QHP; Thu, 16 Apr 2026 06:42:15 +0000 Date: Thu, 16 Apr 2026 07:42:14 +0100 Message-ID: <868qan2ypl.wl-maz@kernel.org> From: Marc Zyngier To: Mukesh Ojha Cc: Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] arm64: cpufeature: Fix GCIE field ordering in ftr_id_aa64pfr2 In-Reply-To: <20260415200031.1885440-1-mukesh.ojha@oss.qualcomm.com> References: <20260415200031.1885440-1-mukesh.ojha@oss.qualcomm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: mukesh.ojha@oss.qualcomm.com, catalin.marinas@arm.com, will@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Wed, 15 Apr 2026 21:00:31 +0100, Mukesh Ojha wrote: > > The ftr_id_aa64pfr2[] array must be sorted in descending order of > shift value so that the overlap validation in init_cpu_features() > works correctly. The GCIE field (bits 15:12, shift=12) was placed > last in the array, after MTEFAR (bits 11:8, shift=8) and > MTESTOREONLY (bits 7:4, shift=4), causing a spurious warning at > boot: > > [ 0.000000] SYS_ID_AA64PFR2_EL1 has feature overlap at shift 12 > [ 0.000000] WARNING: arch/arm64/kernel/cpufeature.c:989 at init_cpu_features+0x144/0x3d0, CPU#0: > swapper/0 > .. > > [ 0.000000] pc : init_cpu_features+0x144/0x3d0 > [ 0.000000] lr : init_cpu_features+0x144/0x3d0 > [ 0.000000] sp : ffffc08678f03dc0 > > ... > 0.000000] x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffffc08678f14000 > [ 0.000000] Call trace: > [ 0.000000] init_cpu_features+0x144/0x3d0 (P) > [ 0.000000] cpuinfo_store_boot_cpu+0x4c/0x5c > [ 0.000000] smp_prepare_boot_cpu+0x28/0x38 > [ 0.000000] start_kernel+0x1d4/0x848 > [ 0.000000] __primary_switched+0x88/0x90 > > This is because the overlap check computes (shift + width) > prev_shift, > i.e. (12 + 4) > 8, which triggers since GCIE occupies bits above MTEFAR > but was listed after it. > > Fix the ordering to match the register layout: FPMR(35:32), GCIE(15:12), > MTEFAR(11:8), MTESTOREONLY(7:4). > > Fixes: 899ff451fcee ("KVM: arm64: Advertise ID_AA64PFR2_EL1.GCIE") > Signed-off-by: Mukesh Ojha This was present in next-20260403, identified the following day, a fix proposed in [1], and the fixed commit appeared in next-20260407 (which was the subsequent -next build) as 7e629348df81b. May I humbly suggest that you check with the latest -next branch before spending time on this sort of things? Two weeks is a pretty long time... Thanks, M. [1] https://lore.kernel.org/all/874ilqcu3c.wl-maz@kernel.org/ -- Without deviation from the norm, progress is not possible.