From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA81DC4708E for ; Wed, 7 Dec 2022 15:19:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229675AbiLGPTL (ORCPT ); Wed, 7 Dec 2022 10:19:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33594 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229480AbiLGPTI (ORCPT ); Wed, 7 Dec 2022 10:19:08 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4A1851DF37 for ; Wed, 7 Dec 2022 07:19:07 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id E7FDBB80189 for ; Wed, 7 Dec 2022 15:19:05 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 87BE9C433C1; Wed, 7 Dec 2022 15:19:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1670426344; bh=VQWsRMBC+GGrQQMr0CFeqK2fNl+WWigx5BDAvuQJ2I4=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=SuNR7Fn/vhi5ChmFZVwfUeLaRgArNdUEMhDlTBmTwpw+tcfYTHOXrmtyrZXt0Znft xupjUyrXufvBnyScEXITMDedDUCxqUIvDAjMTDt4PuWrOG6dkX+goFed4jipeuAKcb pe76S9XWbehmUlvHNEc7Vwrp/eT3QihCt1C4teN8b94y+fLxb0IS5SaGyWPDtz8QjF tk2mUcWP5u3xqQZ63zM/wdXgQpv5GxBE9yGWBounyZgqY4ofS3HqJ1mVna0U2MF8m3 y5fpBDTyzDoj28Jji6mMTXt4hq9IWh7Gn8IapAXarUheswzMbGt2odYi2zUl/4bUAt 3Yldao6Xm84xQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1p2wCM-00B9JD-7w; Wed, 07 Dec 2022 15:19:02 +0000 Date: Wed, 07 Dec 2022 15:19:01 +0000 Message-ID: <86a63zkzru.wl-maz@kernel.org> From: Marc Zyngier To: Harry Song Cc: tglx@linutronix.de, linux-kernel@vger.kernel.org Subject: Re: [PATCH] irqchip/gic-v3-its: remove the shareability of ITS In-Reply-To: <20221207135223.3938-1-jundongsong1@gmail.com> References: <20221207135223.3938-1-jundongsong1@gmail.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: jundongsong1@gmail.com, tglx@linutronix.de, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 07 Dec 2022 13:52:23 +0000, Harry Song wrote: > > I know this is a very wrong patch, but my platform > has an abnormal ITS problem caused by data consistency: > My chip does not support Cache Coherent Interconnect (CCI). That doesn't mean much. Nothing mandates to have a CCI, and plenty of systems have other ways to maintain coherency. > By default, ITS driver is the inner memory attribute. > gits_write_cbaser() is used to write the inner memory > attribute. But hw doesn't return the hardware's non-shareable > property,so I don't think reading GITS_CBASER and GICR_PROPBASER > here will get the real property of the current hardware: inner > or outer shareable is not supported, so I would like to know > whether ITS driver cannot be used on chips without CCI, or > what method can be used to use ITS driver on chips without CCI? It's not about CCI or not CCI. It is about which shareability domain your ITS is in. And it doesn't only affect the ITS. It also affects the redistributors, and anything that accesses memory. > > The current patch is designed to make ITS think that the current > chip has no inner or outer memory properties, and then use > its by flushing dcache. > > This is the log for bug reports without patches: > > [ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000000003460000 > [ 0.000000] ITS [mem 0x03440000-0x0345ffff] > [ 0.000000] ITS@0x0000000003440000: allocated 8192 Devices @41850000 (indirect, esz 8, psz 64K, shr 0) > [ 0.000000] ITS@0x0000000003440000: allocated 32768 Interrupt Collections @41860000 (flat, esz 2, psz 64K, shr 0) > [ 0.000000] GICv3: using LPI property table @0x0000000041870000 > [ 0.000000] GICv3: CPU0: using allocated LPI pending table @0x0000000041880000 > [ 0.000000] ITS queue timeout (64 1) > [ 0.000000] ITS cmd its_build_mapc_cmd failed > [ 0.000000] ITS queue timeout (128 1) > [ 0.000000] ITS cmd its_build_invall_cmd failed Ah, this suspiciously looks like a Rockchip machine... > > Signed-off-by: Harry Song > --- > > I am very sorry to bother you. This problem has been bothering me > for several weeks. I am looking forward to your reply. If you have such issue, this needs to be handled as per-platform quirk. I'm not putting such generic hacks in the driver. M. -- Without deviation from the norm, progress is not possible.