From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E3001280330; Wed, 25 Feb 2026 09:23:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772011412; cv=none; b=hNPZGm8HlbF9BiaVQzlVIN5Z7a2wqD8MTpDfqFdg79oNTkvI7lkmEQaJ6sVlFWdqUJ3LSXxb6H5QY0/alkASWw96avfjvP53nYMf2nvwjEmXCEPDsooiKCHJMzOz7H/lnJTMvMzt8OSHpoW8Rs4fXEi/y8W32auPUYLnhRUf4jc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772011412; c=relaxed/simple; bh=JFkrWsgc/7AYlbUJ9p82QT6qyV/enHen26ELw13vgJo=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=GC7+ZDEjUlx8Vf/1NCntgLDCH46toj6aC+9V8JDYx4vlwTKx1f9YxBYvPVlDNrvTCfXCYnNP/YGHSpoo6zUweKoRl7rgv6pEwwQyaRc4tWwKK5EUFJJaPxiOy8djalfbDuFXPMn4nBPYHOyGvqobhERD6B5R4OJzMZDySTpAdnA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=PTuzSXVa; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="PTuzSXVa" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B5BFAC116D0; Wed, 25 Feb 2026 09:23:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772011411; bh=JFkrWsgc/7AYlbUJ9p82QT6qyV/enHen26ELw13vgJo=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=PTuzSXVarUOzvaiL8C7BVNc5bPOZEyDECIkDioAe2QDuRPzJIlvWhsYCN4M5lIrvE DH7+okLAw17sFBOdC8yrSmZtcnq33UoTJ8s72jpYlVb5Qd+LQIB3CzpXGn1AZb5zVQ fyWfwqNZ8gtZmUKTwt+i3mnYDuD4Ievc1sdB4YsPL1e00QyUWMQI6GVDcVAKL9cplP cQG7YPRIcUfB4+x/43XhIWSQWG8Wjlj3qp/90ZUYcZCqpbGKewVwNtNQcCA/45Iu2O IDvVEB0lT2n+/UPi8x8nNPVdJHm6uuvLBElZ2kAWuJVHFYYGMllxXQVZIdT7FAJn+Q lk5anG+V5sBZQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1vvB7B-0000000Ddvy-1k4y; Wed, 25 Feb 2026 09:23:29 +0000 Date: Wed, 25 Feb 2026 09:23:29 +0000 Message-ID: <86bjhd9nxq.wl-maz@kernel.org> From: Marc Zyngier To: Anshuman Khandual Cc: linux-arm-kernel@lists.infradead.org, Catalin Marinas , Will Deacon , Ryan Roberts , Mark Rutland , Oliver Upton , linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev Subject: Re: [PATCH 1/2] arm64/mm: Directly use TTBRx_EL1_ASID_MASK In-Reply-To: <20260225035157.1159962-2-anshuman.khandual@arm.com> References: <20260225035157.1159962-1-anshuman.khandual@arm.com> <20260225035157.1159962-2-anshuman.khandual@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: anshuman.khandual@arm.com, linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com, will@kernel.org, ryan.roberts@arm.com, mark.rutland@arm.com, oupton@kernel.org, linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Wed, 25 Feb 2026 03:51:56 +0000, Anshuman Khandual wrote: > > Replace all TTBR_ASID_MASK macro instances with TTBRx_EL1_ASID_MASK which > is a standard field mask from tools sysreg format. Drop the now redundant > custom macro TTBR_ASID_MASK. No functional change. > > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Marc Zyngier > Cc: Oliver Upton > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > Cc: kvmarm@lists.linux.dev > Signed-off-by: Anshuman Khandual > --- > arch/arm64/include/asm/asm-uaccess.h | 2 +- > arch/arm64/include/asm/mmu.h | 1 - > arch/arm64/include/asm/mmu_context.h | 2 +- > arch/arm64/include/asm/uaccess.h | 6 +++--- > arch/arm64/kernel/entry.S | 2 +- > arch/arm64/kvm/at.c | 2 +- > arch/arm64/kvm/nested.c | 4 ++-- > arch/arm64/mm/context.c | 6 +++--- > 8 files changed, 12 insertions(+), 13 deletions(-) > > diff --git a/arch/arm64/include/asm/asm-uaccess.h b/arch/arm64/include/asm/asm-uaccess.h > index 9148f5a31968..12aa6a283249 100644 > --- a/arch/arm64/include/asm/asm-uaccess.h > +++ b/arch/arm64/include/asm/asm-uaccess.h > @@ -15,7 +15,7 @@ > #ifdef CONFIG_ARM64_SW_TTBR0_PAN > .macro __uaccess_ttbr0_disable, tmp1 > mrs \tmp1, ttbr1_el1 // swapper_pg_dir > - bic \tmp1, \tmp1, #TTBR_ASID_MASK > + bic \tmp1, \tmp1, #TTBRx_EL1_ASID_MASK > sub \tmp1, \tmp1, #RESERVED_SWAPPER_OFFSET // reserved_pg_dir > msr ttbr0_el1, \tmp1 // set reserved TTBR0_EL1 > add \tmp1, \tmp1, #RESERVED_SWAPPER_OFFSET > diff --git a/arch/arm64/include/asm/mmu.h b/arch/arm64/include/asm/mmu.h > index 137a173df1ff..019b36cda380 100644 > --- a/arch/arm64/include/asm/mmu.h > +++ b/arch/arm64/include/asm/mmu.h > @@ -10,7 +10,6 @@ > #define MMCF_AARCH32 0x1 /* mm context flag for AArch32 executables */ > #define USER_ASID_BIT 48 > #define USER_ASID_FLAG (UL(1) << USER_ASID_BIT) > -#define TTBR_ASID_MASK (UL(0xffff) << 48) > > #ifndef __ASSEMBLER__ > > diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h > index cc80af59c69e..5b1ecde9f14b 100644 > --- a/arch/arm64/include/asm/mmu_context.h > +++ b/arch/arm64/include/asm/mmu_context.h > @@ -210,7 +210,7 @@ static inline void update_saved_ttbr0(struct task_struct *tsk, > if (mm == &init_mm) > ttbr = phys_to_ttbr(__pa_symbol(reserved_pg_dir)); > else > - ttbr = phys_to_ttbr(virt_to_phys(mm->pgd)) | ASID(mm) << 48; > + ttbr = phys_to_ttbr(virt_to_phys(mm->pgd)) | ASID(mm) << TTBRx_EL1_ASID_SHIFT; > Could you please use FIELD_PREP() for this sort of constructs? [...] > diff --git a/arch/arm64/kvm/at.c b/arch/arm64/kvm/at.c > index 885bd5bb2f41..d5c342ccf0f9 100644 > --- a/arch/arm64/kvm/at.c > +++ b/arch/arm64/kvm/at.c > @@ -560,7 +560,7 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi, > BUG(); > } > > - wr->asid = FIELD_GET(TTBR_ASID_MASK, asid_ttbr); > + wr->asid = FIELD_GET(TTBRx_EL1_ASID_MASK, asid_ttbr); > if (!kvm_has_feat_enum(vcpu->kvm, ID_AA64MMFR0_EL1, ASIDBITS, 16) || > !(tcr & TCR_ASID16)) > wr->asid &= GENMASK(7, 0); > diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c > index 620126d1f0dc..82558fb2685f 100644 > --- a/arch/arm64/kvm/nested.c > +++ b/arch/arm64/kvm/nested.c > @@ -1343,7 +1343,7 @@ static bool kvm_vncr_tlb_lookup(struct kvm_vcpu *vcpu) > vcpu_read_sys_reg(vcpu, TTBR0_EL2)); > u16 asid; > > - asid = FIELD_GET(TTBR_ASID_MASK, ttbr); > + asid = FIELD_GET(TTBRx_EL1_ASID_MASK, ttbr); > if (!kvm_has_feat_enum(vcpu->kvm, ID_AA64MMFR0_EL1, ASIDBITS, 16) || > !(tcr & TCR_ASID16)) > asid &= GENMASK(7, 0); > @@ -1459,7 +1459,7 @@ static void kvm_map_l1_vncr(struct kvm_vcpu *vcpu) > vcpu_read_sys_reg(vcpu, TTBR0_EL2)); > u16 asid; > > - asid = FIELD_GET(TTBR_ASID_MASK, ttbr); > + asid = FIELD_GET(TTBRx_EL1_ASID_MASK, ttbr); > if (!kvm_has_feat_enum(vcpu->kvm, ID_AA64MMFR0_EL1, ASIDBITS, 16) || > !(tcr & TCR_ASID16)) > asid &= GENMASK(7, 0); Given the 3 hunks above, there is clearly a better approach. Thanks, M. -- Without deviation from the norm, progress is not possible.