From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 91D8C14D711; Wed, 21 Aug 2024 16:40:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724258409; cv=none; b=WpuFYcpIBiyw7x1YkYYhKJvLZATBV4f6PVVXsL6zta4lrI7ZKvwFJxxs4vjGmT6oFzNaTI2Uzi6VysGmPJWcWs3VOZhCL5hIIIpzkLZ6c3Og9LTx3ogxK1A9fIluWaFY7DDA+GAC1q6P+x+SOO2HHgoipAwl6tLP4YAxgfsdfhQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724258409; c=relaxed/simple; bh=i/mb4Rdm8eNfaYVfTxUHpcRDCFr7vBDdRywXy1aBhUs=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=ELl2gVEtBR75bp/ARMT9PLwbR8UviAP2L5/yVbo1ka/UrQr5dF3D/vsmM4z+xdyo/Mf0mSOdSF68+zvDn0MNn2kAqlLjSFojOH09lMIeydvT4hkjWQdKpTWpVrhtacHh0Wiy214ZFrkcQXplNnb1hwtKZm3ybGr3CVUXv88YoQ4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=BTPlLGzf; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="BTPlLGzf" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1F387C32781; Wed, 21 Aug 2024 16:40:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1724258409; bh=i/mb4Rdm8eNfaYVfTxUHpcRDCFr7vBDdRywXy1aBhUs=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=BTPlLGzf/rOkRoEuCyFLMupInG7QL2OgmLGETnQ58eRmBS4n98NCXkUelAv6kDSRj /dDmsjnsGzfVULXN1LHRIVMGsAyCfF04ZPrEB8LeonXypLtVOMAJr6holszVqYSBxK O3uJmezyDePmzqiqs7xV1ng8uacA/ZQ9BHsP1+ls8kvpBJJK7sHYmU9S0FoyHYWzmK +qkYW4cSQOT+XQypkaXVB1+Wa2uzYOpo5s6sW4cr37YID+xaDxqgufo+Hw30LRkZyI fQnMMAcX/w7NXAgsdIkCkbmEPzj9sFnlSWE3N2vT1zqQBNlASp+/kfXesNvGrv2Qrd UlJZOe3rLuBEg== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1sgoNT-005fap-2M; Wed, 21 Aug 2024 17:40:07 +0100 Date: Wed, 21 Aug 2024 17:40:06 +0100 Message-ID: <86bk1lygm1.wl-maz@kernel.org> From: Marc Zyngier To: Mark Brown Cc: Oliver Upton , James Morse , Suzuki K Poulose , Catalin Marinas , Will Deacon , Joey Gouly , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCH 0/2] KVM: arm64: Control visibility of S1PIE related sysregs to userspace In-Reply-To: <5304749b-04c8-44f4-b4de-b2d0cef61169@sirena.org.uk> References: <20240821-kvm-arm64-hide-pie-regs-v1-0-08cb3c79cb57@kernel.org> <86ed6ixa32.wl-maz@kernel.org> <86cym2x7cv.wl-maz@kernel.org> <5304749b-04c8-44f4-b4de-b2d0cef61169@sirena.org.uk> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: broonie@kernel.org, oliver.upton@linux.dev, james.morse@arm.com, suzuki.poulose@arm.com, catalin.marinas@arm.com, will@kernel.org, joey.gouly@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Wed, 21 Aug 2024 16:19:59 +0100, Mark Brown wrote: > > On Wed, Aug 21, 2024 at 03:45:20PM +0100, Marc Zyngier wrote: > > > Ultimately, we need to revisit the way we deal with visibility, as > > adding a myriad of helpers checking a combination of features doesn't > > scale. That information should exist as a static table, just like the > > trap bits. > > Indeed, I was wondering about just adding a description of the relevant > ID register field to the sys_regs table. You'd need more than that. How would you express the visibility of TCR2_EL2? It depends on both ID_AA64PFR0_EL1.EL2==1 *and* ID_AA64MMFR3_EL1.TCRX==1. So it cannot be just a single tuple { idreg, field, value }. It needs to be an arbitrary conjunction of those. The good news is that it is a much smaller table than the monster trap routing table: it is "enum vcpu_sysreg" plus things that are synthesised (anything with a .get_user callback). M. -- Without deviation from the norm, progress is not possible.