From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C88392853F7; Fri, 11 Jul 2025 10:51:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752231102; cv=none; b=IWyG7lpX2pmGEqR2UvLI18gVnpSNMxURs2nhMvxV5xvAyKIM/2zVjLi+QUXXzUlgkA7bAmJYZ18aybj1y8CUf/F4C7xY2FMFPghMnCAPUNJzgP17Q5qAZGDWr2e4G+QyajR9ui6wFiSF6Oc3klR5K56sbsger+n7Yw/lt4sN6lE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752231102; c=relaxed/simple; bh=84BMvuy9Pk8YrU/GpAF8QkVxJqmSioEdul6p6Hjaas8=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=aFbVxDugEqRWXFtxjrkjV4fH9PXEv+UzF9YISCSyZT6KvTwTCIGRH62EUo00a/8MgyuQmzfr0/7VN4n1BxKF/Cm3OyjLt6pjC7OTWOhbLVrYvAFl8zYhqzZi8y44nrVIDx5CY5pI4WE9eMCfi5nD0KoC/edsiwD1k9dehjB4Jhg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=j8hj78Nk; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="j8hj78Nk" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 49E6DC4CEF4; Fri, 11 Jul 2025 10:51:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1752231101; bh=84BMvuy9Pk8YrU/GpAF8QkVxJqmSioEdul6p6Hjaas8=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=j8hj78NkD71YdFzBqvHsQJbSBSgu9I4hzkRnOEj/kjR36IMWi68LRMOzqoUQPn2x5 6pIzQK5S+UYCJVZxQ1NFAmQ0FCdQsPdKxtf0vG8wCudjXLSmchmTL+aDsmkXyTRpvl MhYKPu7xnvwdeWPlJ5DZ5OqvpqQkVmezKz6SFoFnihU9MwLhx/momFAOxAEGwdIwwG LwaFbPNIe/nIceApqIht/C5MEZjbkyztuCcQL2UIgC8nIeeTs26ae6QLLZSBn2iomN RAXxnD81+Nvirs2ZQpTz3D5TCPKYc24jH1xlp32xHmUh5HM49fzaTadIg9mViuIkwA myZTLQaGFiZgw== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1uaBLv-00EqW3-79; Fri, 11 Jul 2025 11:51:39 +0100 Date: Fri, 11 Jul 2025 11:51:38 +0100 Message-ID: <86cya79f0l.wl-maz@kernel.org> From: Marc Zyngier To: Lorenzo Pieralisi Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Toan Le , Krzysztof =?UTF-8?B?V2lsY3p5xYRza2k=?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Thomas Gleixner Subject: Re: [PATCH v2 09/13] PCI: xgene-msi: Sanitise MSI allocation and affinity setting In-Reply-To: References: <20250708173404.1278635-1-maz@kernel.org> <20250708173404.1278635-10-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: lpieralisi@kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, toan@os.amperecomputing.com, kwilczynski@kernel.org, mani@kernel.org, robh@kernel.org, bhelgaas@google.com, tglx@linutronix.de X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Fri, 11 Jul 2025 11:11:02 +0100, Lorenzo Pieralisi wrote: > > On Fri, Jul 11, 2025 at 11:55:17AM +0200, Lorenzo Pieralisi wrote: > > On Tue, Jul 08, 2025 at 06:34:00PM +0100, Marc Zyngier wrote: > > [...] > > > We could use MSInRx_HWIRQ_MASK, I can update it. > > > > More importantly, what code would set data->hwirq[6:4] (and > > data->hwirq[7:7] below) ? > > Forget it. It is the hwirq allocation itself that sets those bits, > 256 HWIRQs you use the effective cpu affinity to steer the frame, > it makes sense now. Exactly. > > I can update the code to use the mask above and merge it. > > Sorry for the noise, No worries, and thanks for looking at it! M. -- Without deviation from the norm, progress is not possible.