From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AC66F6D1B9; Tue, 18 Jun 2024 07:39:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718696375; cv=none; b=ZVwhr+P8GIXVctsTww+PnuDSKNuv8tEzlf3zoygZIxK9cRfU+kHkhtF1TrwMnM57tj9GN/hnRQ/yHQOLcROFjXMfCWxPFqY17l83WeHpSukcf/POhhHimOYj5RgkA3/0MsmS4/8Umg10dZl1HEk3z7ciKMMB1RAY6jYUFP2QjOg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718696375; c=relaxed/simple; bh=0El7CzpYQS3gWNlhG7y7pashdZiYbHusc0JthGLSWkY=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=jDNTWzyvvEXSiXIAviGbmlpqIMC+gNSF5XWCn5oxZbGM+HPwhrwrlc8cFkofyanPOwmhjBAuB8UQvHBRvejQF9pdMWOCUIOVFGJlH/LTFh/Fc6G8vQguOImx1ir18KJRjrCyILhwgppLgkpJTNoCUgk5LZC7RIebedmWqfS43h8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=WHVbaEvh; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="WHVbaEvh" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2875BC3277B; Tue, 18 Jun 2024 07:39:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1718696375; bh=0El7CzpYQS3gWNlhG7y7pashdZiYbHusc0JthGLSWkY=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=WHVbaEvhFnB00H9byY/5+JXJ2c+htVOhH6C0vUNPgD8fByXctSUPL76khukO5RQ3M pDgHC8mfcl4zVuJyCGdaAwXtlcenmC+qR3p9icVhNf2cXI9mEByMEZJJPlYgieFJSa 038WgFwbsc/8OfjhB4EBCxh7wriV/VD6EcST2b9HM0t/EWM9ZK4lUXKXvRt8nqkLmp wfMOAu9T3qQwx7vqk28pazMkGktRmhUDIdHDxWpg3BiE7soFnBWsXjkzc7Zbj/Fj+N CMpwHWxKyooAfRIK4tMmvk0Y7gWEEYqBnxxWjyam6bDI7zzb3EZYNRqfKEYUqOosEk TqVLMDt5NTXmQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1sJTRE-004rtB-RG; Tue, 18 Jun 2024 08:39:32 +0100 Date: Tue, 18 Jun 2024 08:39:32 +0100 Message-ID: <86ed8uk8cr.wl-maz@kernel.org> From: Marc Zyngier To: Shaoqin Huang Cc: Oliver Upton , kvmarm@lists.linux.dev, James Morse , Suzuki K Poulose , Zenghui Yu , Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 1/2] KVM: arm64: Allow userspace to change ID_AA64PFR1_EL1 In-Reply-To: <20240618063808.1040085-2-shahuang@redhat.com> References: <20240618063808.1040085-1-shahuang@redhat.com> <20240618063808.1040085-2-shahuang@redhat.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.2 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: shahuang@redhat.com, oliver.upton@linux.dev, kvmarm@lists.linux.dev, james.morse@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Tue, 18 Jun 2024 07:38:06 +0100, Shaoqin Huang wrote: > > Allow userspace to change the guest-visible value of the register with > some severe limitation: > > - No changes to features not virtualized by KVM (MPAM_frac, RAS_frac) > --- > arch/arm64/kvm/sys_regs.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index 22b45a15d068..bead81867bce 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -2306,7 +2306,8 @@ static const struct sys_reg_desc sys_reg_descs[] = { > ID_AA64PFR0_EL1_GIC | > ID_AA64PFR0_EL1_AdvSIMD | > ID_AA64PFR0_EL1_FP), }, > - ID_SANITISED(ID_AA64PFR1_EL1), > + ID_WRITABLE(ID_AA64PFR1_EL1, ~(ID_AA64PFR1_EL1_RAS_frac | > + ID_AA64PFR1_EL1_MPAM_frac)), > ID_UNALLOCATED(4,2), > ID_UNALLOCATED(4,3), > ID_WRITABLE(ID_AA64ZFR0_EL1, ~ID_AA64ZFR0_EL1_RES0), This isn't a valid patch. Furthermore, how about all the other features that may or may not be currently handled by KVM? Please see [1] and make sure that all existing fields have a known behaviour (a combination of masked, preserved, capped, writable or read-only). I can at least see problems with MTE_frac and MTEX, plus all the other things that KVM doesn't know how to save/restore (THE, GCS, NMI...). What I asked you to handle the whole register, I really meant it. M. [1] https://developer.arm.com/documentation/ddi0601/2024-03/AArch64-Registers/ID-AA64PFR1-EL1--AArch64-Processor-Feature-Register-1?lang=en -- Without deviation from the norm, progress is not possible.