From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1D8833EBF16; Thu, 18 Jun 2026 10:10:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781777419; cv=none; b=qhDMfCw29QMiVJkpAOmpc+Dky5VHQCNI5sovFCHdfJdlJKktCuA/PfJPkYqXEPfkyv7G3fTQUX+uDX1Ato+edyK520pcgc8oqWwRaTU9kfpey2QRu68RyM65pUF0fAncJIzajOZXExyYRY4EGhrezuLQVirtZJgYZfsSLS0CmcU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781777419; c=relaxed/simple; bh=XoFpggIC90Bt6ZQLBYo2KFXYKQeWf040VAzIZMA+e8U=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=H4lE1RUDyQk/SVphEMD7oRci5jw2z0ASV48DYUpPadI2ZknALLHPzKSARi26UW9H2RPLjl3XnEhlD1Ke7emUMcZqwcDi0yffDxiz+eLrOc5TgKnM+z5qW1h0U6pyAWK+q7z38WN3oF8yy7ZAkKiPotxudKPPMFrM3FJjS+kSF5Y= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ShVIG4xm; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ShVIG4xm" Received: by smtp.kernel.org (Postfix) with ESMTPSA id CF3321F000E9; Thu, 18 Jun 2026 10:10:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1781777413; bh=RJeDZ8MzzJtFaVX8Goz2+Ds5/kUxUd9U6K4ASVsZApg=; h=Date:From:To:Cc:Subject:In-Reply-To:References; b=ShVIG4xmNuuKeS/lspiqhEROcIOqVpD2Er3sM9FckyE5UEa68+Y4LCiLy7HHaPR3+ UMalruvc8WVKuN7fd4IrhNHy+O6WZw7j5cYNmz3yH5Av+YNJM0CsLfT2+fih4J6P/I TRzE6O2uV9XSr33H+tzCPOAksMtiDWUyNd+tc0abVNMsKvM28/79PYvO2+rCohqwtE McHbRNRR9+xzSh/NDuepyam2g5dMs1bZccoJjUA8RH0D16GM3XDkzdN0LwKEX4Vp1E upnVhVkDKJtpQRkTQ8Y17aGkfHLpTaPN8Yo+Ho/qVEr6qYXn5LPRNvCCJSiBCkjnbJ Ha8hpsEUJKNaA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wa9hL-0000000Dxkr-3mWi; Thu, 18 Jun 2026 10:10:12 +0000 Date: Thu, 18 Jun 2026 11:10:11 +0100 Message-ID: <86h5n0rwfw.wl-maz@kernel.org> From: Marc Zyngier To: tabba@google.com Cc: Oliver Upton , Will Deacon , Catalin Marinas , Quentin Perret , Vincent Donnefort , Sebastian Ene , Per Larsen , Suzuki K Poulose , Zenghui Yu , Joey Gouly , Steffen Eiden , Mark Rutland , Jonathan Cameron , Hyunwoo Kim , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCH v1 10/11] KVM: arm64: Add primitives to flush/sync the VGIC state at EL2 In-Reply-To: <20260612065925.755562-11-tabba@google.com> References: <20260612065925.755562-1-tabba@google.com> <20260612065925.755562-11-tabba@google.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: tabba@google.com, oupton@kernel.org, will@kernel.org, catalin.marinas@arm.com, qperret@google.com, vdonnefort@google.com, sebastianene@google.com, perlarsen@google.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, joey.gouly@arm.com, seiden@linux.ibm.com, mark.rutland@arm.com, jonathan.cameron@huawei.com, imv4bel@gmail.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Fri, 12 Jun 2026 07:59:24 +0100, tabba@google.com wrote: > > From: Marc Zyngier > > pKVM performs its own world switch for protected VMs but has no > primitives to move the per-vCPU VGIC state between the host and > hypervisor vCPU contexts. > > Add flush_hyp_vgic_state() and sync_hyp_vgic_state(). Flush copies > vgic_hcr, the in-use list registers and used_lrs from the host into the > hyp vCPU and pins vgic_sre to a fixed value; sync copies vgic_hcr, > vgic_vmcr and the in-use list registers back. The active priority > registers are handled separately by the save/restore-aprs path. > > Signed-off-by: Marc Zyngier > Co-developed-by: Fuad Tabba > Signed-off-by: Fuad Tabba > --- > arch/arm64/kvm/hyp/nvhe/hyp-main.c | 50 +++++++++++++++++++++++++----- > 1 file changed, 42 insertions(+), 8 deletions(-) > > diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-main.c b/arch/arm64/kvm/hyp/nvhe/hyp-main.c > index 2f165b6c7b07..23e644c24a03 100644 > --- a/arch/arm64/kvm/hyp/nvhe/hyp-main.c > +++ b/arch/arm64/kvm/hyp/nvhe/hyp-main.c > @@ -99,6 +99,46 @@ static void fpsimd_sve_sync(struct kvm_vcpu *vcpu) > *host_data_ptr(fp_owner) = FP_STATE_HOST_OWNED; > } > > +static void flush_hyp_vgic_state(struct pkvm_hyp_vcpu *hyp_vcpu) > +{ > + struct kvm_vcpu *host_vcpu = hyp_vcpu->host_vcpu; > + struct vgic_v3_cpu_if *host_cpu_if, *hyp_cpu_if; > + unsigned int used_lrs, max_lrs, i; > + > + host_cpu_if = &host_vcpu->arch.vgic_cpu.vgic_v3; > + hyp_cpu_if = &hyp_vcpu->vcpu.arch.vgic_cpu.vgic_v3; > + > + max_lrs = (read_gicreg(ICH_VTR_EL2) & ICH_VTR_EL2_ListRegs) + 1; This really needs to be rebased on the current state of kvmarm/next, particularly 8cc8bbbfab14c ("KVM: arm64: Bound used_lrs when flushing the pKVM hyp vCPU"). I really want to avoid using ICH_VTR_EL2 on each and every entry to the guest, as this has really bad performance impacts when running this under NV (which is the only way I run pKVM). Thanks, M. -- Without deviation from the norm, progress is not possible.