From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D665B187544 for ; Mon, 17 Jun 2024 07:43:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718610226; cv=none; b=c+PuUAQF7bTxMCV6LDW740HAy0mMvUP8tPZKJ8F/7NZkaT7HJYzHI6iDwg92o5N9bJJmx1yx4wJ9p9QQMIaERg8cpdi07/InhvSulFOwFnoms3Pvfp/q5Nv7a08Nl0BaxLMBKuKUfXZzdCwHU24cMgBUCdRI1qWBwWnDWxp58MQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718610226; c=relaxed/simple; bh=8BJEdFGc/bKOzaqBjHJa7B+oGPgBlMGR+Mnc8XI09bA=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=ZibbupyeZ3/CIexmg5MRuCYXyXe8t/XWv48Y26NlFuP4783bg/Y4QaehTjybVKb3wNVgG3fFvTCKeZiyo7C+swO6Ylf4MeW5R+yL3Wq9ZhZrD+PwkyU+m3Q2tVQM8L4VIx3aA6ro4A9I8rSkgUzADsCLlSD6mrVkkTe1fperpYY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=t1ViBl3A; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="t1ViBl3A" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 57437C2BD10; Mon, 17 Jun 2024 07:43:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1718610226; bh=8BJEdFGc/bKOzaqBjHJa7B+oGPgBlMGR+Mnc8XI09bA=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=t1ViBl3AyI7NL+OfXKe9/iIGKb5x4X/cUA1sSxyDpu5OSqsJGofh3LRW3V5+RQg/a otb6z964S2DHNQugu1r77I2SXOGCq7pCCHSsll7sthmecCShUkn/szXKv0vaLsJ4rl +O0T6Sd/XnwWGsO1d2PhrxxC6rZ2gVtk9G+kI1oJ8Fa9EPQRGKSY4oI36kARYrEkfL ry9Vime9qf4dy1AXR7dXqihzaileyY1dDa3NxVhGa/EO0AoZtV3pgCxXpeh/vVVhtK B0icG3Bg4uAjRU4KH5R8JNUDKu3fDrl9u5XIPPaK7LOe0BxE8hnBTrKoa38Kuhl9dT JFKyrSxHt3pzg== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1sJ71k-004VcU-Fj; Mon, 17 Jun 2024 08:43:44 +0100 Date: Mon, 17 Jun 2024 08:43:43 +0100 Message-ID: <86iky8j9ow.wl-maz@kernel.org> From: Marc Zyngier To: Anshuman Khandual Cc: linux-arm-kernel@lists.infradead.org, mark.rutland@arm.com, ryan.roberts@arm.com, Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org Subject: Re: [PATCH] arm64/mm: Drop ESR_ELx_FSC_TYPE In-Reply-To: <45ace175-9b59-4ba2-91b8-b96151c03c05@arm.com> References: <20240613094538.3263536-1-anshuman.khandual@arm.com> <86y179jdbx.wl-maz@kernel.org> <87cyoj3j44.wl-maz@kernel.org> <45ace175-9b59-4ba2-91b8-b96151c03c05@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.2 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: anshuman.khandual@arm.com, linux-arm-kernel@lists.infradead.org, mark.rutland@arm.com, ryan.roberts@arm.com, catalin.marinas@arm.com, will@kernel.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Mon, 17 Jun 2024 04:15:40 +0100, Anshuman Khandual wrote: > > Does the following re-worked patch looks okay ? Earlier set_thread_esr() changes > can be dropped from arch/arm64/mm/fault.c and also the original commit message > still makes sense. > > diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h > index 7abf09df7033..6cd13ac61005 100644 > --- a/arch/arm64/include/asm/esr.h > +++ b/arch/arm64/include/asm/esr.h > @@ -121,6 +121,13 @@ > #define ESR_ELx_FSC_SECC (0x18) > #define ESR_ELx_FSC_SECC_TTW(n) (0x1c + (n)) > > +/* Status codes for individual page table levels */ > +#define ESR_ELx_FSC_ACCESS_L(n) (ESR_ELx_FSC_ACCESS + n) > +#define ESR_ELx_FSC_FAULT_nL (0x2C) > +#define ESR_ELx_FSC_FAULT_L(n) (((n) < 0 ? ESR_ELx_FSC_FAULT_nL : \ > + ESR_ELx_FSC_FAULT) + (n)) > +#define ESR_ELx_FSC_PERM_L(n) (ESR_ELx_FSC_PERM + n) > + > /* ISS field definitions for Data Aborts */ > #define ESR_ELx_ISV_SHIFT (24) > #define ESR_ELx_ISV (UL(1) << ESR_ELx_ISV_SHIFT) > @@ -388,20 +395,33 @@ static inline bool esr_is_data_abort(unsigned long esr) > > static inline bool esr_fsc_is_translation_fault(unsigned long esr) > { > - /* Translation fault, level -1 */ > - if ((esr & ESR_ELx_FSC) == 0b101011) > - return true; > - return (esr & ESR_ELx_FSC_TYPE) == ESR_ELx_FSC_FAULT; > + esr = esr & ESR_ELx_FSC; > + > + return (esr == ESR_ELx_FSC_FAULT_L(3)) || > + (esr == ESR_ELx_FSC_FAULT_L(2)) || > + (esr == ESR_ELx_FSC_FAULT_L(1)) || > + (esr == ESR_ELx_FSC_FAULT_L(0)) || > + (esr == ESR_ELx_FSC_FAULT_L(-1)); > } > > static inline bool esr_fsc_is_permission_fault(unsigned long esr) > { > - return (esr & ESR_ELx_FSC_TYPE) == ESR_ELx_FSC_PERM; > + esr = esr & ESR_ELx_FSC; > + > + return (esr == ESR_ELx_FSC_PERM_L(3)) || > + (esr == ESR_ELx_FSC_PERM_L(2)) || > + (esr == ESR_ELx_FSC_PERM_L(1)) || > + (esr == ESR_ELx_FSC_PERM_L(0)); > } > > static inline bool esr_fsc_is_access_flag_fault(unsigned long esr) > { > - return (esr & ESR_ELx_FSC_TYPE) == ESR_ELx_FSC_ACCESS; > + esr = esr & ESR_ELx_FSC; > + > + return (esr == ESR_ELx_FSC_ACCESS_L(3)) || > + (esr == ESR_ELx_FSC_ACCESS_L(2)) || > + (esr == ESR_ELx_FSC_ACCESS_L(1)) || > + (esr == ESR_ELx_FSC_ACCESS_L(0)); > } > > /* Indicate whether ESR.EC==0x1A is for an ERETAx instruction */ This looks better indeed. Thanks, M. -- Without deviation from the norm, progress is not possible.