From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 541E5E7B5E5 for ; Wed, 4 Oct 2023 10:32:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233184AbjJDKcd (ORCPT ); Wed, 4 Oct 2023 06:32:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44214 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242149AbjJDKSQ (ORCPT ); Wed, 4 Oct 2023 06:18:16 -0400 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6ED29AF for ; Wed, 4 Oct 2023 03:18:12 -0700 (PDT) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BCD9FC433C7; Wed, 4 Oct 2023 10:18:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1696414691; bh=zgBcifi1XWcmTTAkPgJMMB7DWNo/I8zGzCMzHMTkoRc=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=PbWcIAYMkiDYXvKTy/GcFQJLRpFGZMJceaBYbf/lbOCou/Y3UCR7QtAllmB1kZvZi C8GNw9wwYGSWToJoj81qf/hOBDRTY7y/wf4AjTl28h7U2s0pO174/tIHN9GJKvf17o F36MFMgdayGluDL8bfUw0L146+t3sUlmRLRlydpcrPY2JdTlftM0gP+lPgAD/nY/R9 reU5aalmfkgv/P/TUX/H9XtDbWd9aTPTiq9aB9JIEc+0539u9fEm2o+zPvfyuz70Ms cKMA3LMO8TYwu/iZdhoQhmU+YTgfuxW+KV/KYNUD20UCRmwo32M/2xQ/vV8aVXM3Cq pWfSvBAZK5lNQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1qnyxF-00112H-BP; Wed, 04 Oct 2023 11:18:09 +0100 Date: Wed, 04 Oct 2023 11:18:09 +0100 Message-ID: <86il7mofmm.wl-maz@kernel.org> From: Marc Zyngier To: Anup Patel Cc: Dmitry Dunaev , dunaich@mail.ru, Thomas Gleixner , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH] irqchip/riscv-intc: Mark INTC nodes for secondary CPUs as initialized. In-Reply-To: References: <20230926102801.1591126-1-dunaev@tecon.ru> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: apatel@ventanamicro.com, dunaev@tecon.ru, dunaich@mail.ru, tglx@linutronix.de, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 26 Sep 2023 11:36:31 +0100, Anup Patel wrote: >=20 > On Tue, Sep 26, 2023 at 3:59=E2=80=AFPM Dmitry Dunaev w= rote: > > > > The current Linux driver irq-riscv-intc initialize IRQ domain only once, > > when init function called on primary hart. In other cases no IRQ domain= is > > created and no operation on interrupt-controller node is performed. > > This is cause of that no common Linux driver can use per-cpu interrupts > > mapped to several CPUs because fwnode of secondary cores INTC is not > > marked as initialized. This device is always will be marked as deferred. > > For example the system with devicetree > > > > cpu0: cpu@0 { > > cpu0_intc: interrupt-controller { > > interrupt-controller; > > compatible =3D riscv,cpu-intc; > > }; > > }; > > > > cpu1: cpu@1 { > > cpu1_intc: interrupt-controller { > > interrupt-controller; > > compatible =3D riscv,cpu-intc; > > }; > > }; > > > > buserr { > > compatible =3D riscv,buserr; > > interrupts-extended =3D <&cpu0_intc 16 &cpu1_intc 16>; > > }; > > > > will always report 'buserr' node as deferred without calling any > > bus probe function. > > > > This patch will mark all secondary nodes passed to irq-riscv-intc > > driver init function as initialized to be able to act as correct > > IRQ phandle node. > > > > Signed-off-by: Dmitry Dunaev > > --- > > drivers/irqchip/irq-riscv-intc.c | 8 ++++++-- > > 1 file changed, 6 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-ris= cv-intc.c > > index 4adeee1bc391..c01a4e8d4983 100644 > > --- a/drivers/irqchip/irq-riscv-intc.c > > +++ b/drivers/irqchip/irq-riscv-intc.c > > @@ -155,8 +155,10 @@ static int __init riscv_intc_init(struct device_no= de *node, > > * for each INTC DT node. We only need to do INTC initialization > > * for the INTC DT node belonging to boot CPU (or boot HART). > > */ > > - if (riscv_hartid_to_cpuid(hartid) !=3D smp_processor_id()) > > + if (riscv_hartid_to_cpuid(hartid) !=3D smp_processor_id()) { > > + fwnode_dev_initialized(of_node_to_fwnode(node), true); >=20 > There is already a patch on LKML to address this. > https://www.spinics.net/lists/kernel/msg4929886.html If this is a fix, why is it buried in a huge series and not brought forward as an independent fix that needs to be picked early? M. --=20 Without deviation from the norm, progress is not possible.