From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2CB5C25179A for ; Tue, 9 Sep 2025 10:21:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757413309; cv=none; b=BlZpYydAIwtwOBiM+RR7lHDSl8dC9Xsh9SHZZmFamxke9ba6IKMsYIcoXFA4elYUa1b0/TQNGKBLZdIGYbhAkbWFfyjLjBxBUe4kWP0L4EkztXcwPQFM5fXPrMUu079rsGOQG3ozQ8UJPECremexe+uLHdXG2dS49xEWvecY+0Q= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757413309; c=relaxed/simple; bh=cFpmBsP45UTK3/ZmeGB/8Mir/QSivzVYm2XoqRzW0LY=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=p6XAd8C6O1kQQHD5CfPdZ5OtZTwWiaCwye3waISL67wz0cQrX43jTqthmHM5ZOzdsOUFZUW9BjkmwNztTPMakYUiqSHJW/9o972ZD1Z6yVwoklBD9nrS0yxVpE5AtUYk9NZNob7TSkvjeNa15TaT4eaSc3qZPUM9iiycpw0mI2c= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ouvoRVGZ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ouvoRVGZ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A39C9C4CEF4; Tue, 9 Sep 2025 10:21:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757413306; bh=cFpmBsP45UTK3/ZmeGB/8Mir/QSivzVYm2XoqRzW0LY=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=ouvoRVGZsQNUAJkUCepsSzvQbI84AfrsXyeIdwgFH8uTgDXyFG4n//Ju2jEee1mL/ 8Ta4CQXWksIif+q+WvStJ/dEngZ2zqBLj+UbWibKgQHH9XBII1rkWs5NM6gPPFzuqW NPREapVPo+paoXUR1/Nk7VwtqUgwYyhmdJWOVoQe4phtU/3SzGZm/av55HKW3OuYiy 8zZjeqcCP+f8c1JWu71WiqyOtq0mKn7te9QZm6SKJJqBFjS+HxFNadGIrO4ubSeqel Zrf+2Dgn4Kw12y+rc9m4jnWgCMMct4w3VlCVTJ9E8tGHzGo2c4/2PMOacHiEN9FTx5 oty9B/LHvsnUQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1uvvTs-00000004du8-2KoA; Tue, 09 Sep 2025 10:21:44 +0000 Date: Tue, 09 Sep 2025 11:21:43 +0100 Message-ID: <86jz28c4eg.wl-maz@kernel.org> From: Marc Zyngier To: Thomas Gleixner Cc: LKML , Bjorn Helgaas Subject: Re: [patch 0/2] PCI/MSI: Avoid PCI level masking during normal operation if requested In-Reply-To: <20250903134437.863638669@linutronix.de> References: <86o6vjelw2.wl-maz@kernel.org> <87ecv1ob9q.ffs@tglx> <20250903134437.863638669@linutronix.de> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: tglx@linutronix.de, linux-kernel@vger.kernel.org, bhelgaas@google.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Wed, 03 Sep 2025 15:04:44 +0100, Thomas Gleixner wrote: > > This is a follow up to Marc's attempt on this: > > https://lore.kernel.org/lkml/20250517103011.2573288-1-maz@kernel.org > > Now that the PCI/MSI side has irq_startup/shutdown() callbacks, which do > the [un]masking at the PCI level, let the MSI parent domains which insist > on being in charge of masking do so for normal operations. > > That avoids going out to the PCI endpoint in the case that an interrupt has > to be masked on arrival of an interrupt in software (lazy) disabled state. > > That's achieved by overwriting the irq_[un]mask() callbacks in the irq/MSI > library. > > As a consequence the conditional mask/unmask logic in the regular > irq_[un]mask() callbacks of the PCI/MSI domain is not longer required. I took this for a quick ride on some of my least favourite machines, and nothing caught fire. FWIW: Acked-by: Marc Zyngier Tested-by: Marc Zyngier Thanks for having re-spun it, M. -- Without deviation from the norm, progress is not possible.