From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E823F15D5D9; Thu, 12 Sep 2024 14:56:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726152977; cv=none; b=UnNeZ3/zwYrcfGM4Q5IqjmEWQWSMyuVj8Eo0f/MsdCoOK5cnV/hIEsvG/8gUa1t1rq0MbUBFGzALQoJCZhpo2NGDpPiuVBaNHKcuN8XIH9OuCZDwtjGduclxI0+6xwuKwvxtzDcu477G3Eov7YELIPWzPUV8f4VezPYDpY2pdq0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726152977; c=relaxed/simple; bh=86au2B0wjGy7LvSXF0wyg5cS7DuvPtZR14wDerQ7g1I=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=FZSAyVfGgUrejU6Wdd6w+XeH66pXvtMULuFew9J8YHN4H0rxGIIrX2OZjLr1y3mi5Yi7BOkrMAFjadtV3W5GAYAA8YbrBpGFmHWImh0suikshP8+tB3doY7NB5OF7zROeMfeho9KeaLQJtvF32bAKiFDNRMOcXsj6xB/D19E4Io= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=czMOKCYj; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="czMOKCYj" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6CEBBC4CEC3; Thu, 12 Sep 2024 14:56:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726152976; bh=86au2B0wjGy7LvSXF0wyg5cS7DuvPtZR14wDerQ7g1I=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=czMOKCYjYsq1PPOlsslj/EcWjZZO2zmwTlE6Lg+dzTcRAFQmvZ7SXFh87LsersfQT bGqilWmXHHW+ETTnM3rqK8ENZvZxvJzScKo1fKK8nKHBF+hRJir79nblDaUUN/gp4X sVVyxt5FxN1gfG9C6JHNdGXFP4rWmmPeQWadE0JxVCapAzyecyVudf4LuiHIOUE3Zf aw7UJuWgzUwbkbxeRVVs2acCGcjRx7cGiuBMpgdMd392vNuNlWIMY4PwqyvLxpW7rw rA+lV1IhX5cUGAGEJSBc2Bng3fQ7nSfj5e/E0ERLQZRc3cSLicuxqbxdnHWmmpoI3c ttoBCTIxBCAIA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1solF0-00CTTg-5d; Thu, 12 Sep 2024 15:56:14 +0100 Date: Thu, 12 Sep 2024 15:56:13 +0100 Message-ID: <86ldzw7wfm.wl-maz@kernel.org> From: Marc Zyngier To: Mark Brown Cc: Fuad Tabba , Oliver Upton , James Morse , Suzuki K Poulose , Catalin Marinas , Will Deacon , Dave Martin , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2] KVM: arm64: Constrain the host to the maximum shared SVE VL with pKVM In-Reply-To: <17cb5e48-ca96-433a-a351-639dd339dfb7@sirena.org.uk> References: <20240912-kvm-arm64-limit-guest-vl-v2-1-dd2c29cb2ac9@kernel.org> <17cb5e48-ca96-433a-a351-639dd339dfb7@sirena.org.uk> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: broonie@kernel.org, tabba@google.com, oliver.upton@linux.dev, james.morse@arm.com, suzuki.poulose@arm.com, catalin.marinas@arm.com, will@kernel.org, Dave.Martin@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Thu, 12 Sep 2024 15:45:27 +0100, Mark Brown wrote: > > [1 ] > On Thu, Sep 12, 2024 at 03:21:43PM +0100, Fuad Tabba wrote: > > > One part that you haven't changed is setting ZCR_EL2 during el2 setup: > > arch/arm64/include/asm/el2_setup.h: .Linit_sve_ : lines 290/291 > > > I guess at that point it's not straightforward to figure sve_max_vl. > > Is there a window after el2 setup where we might actually get the VL > > implied by ZCR_ELx_LEN_MASK, or would it always get set to > > sve_vq_from_vl(kvm_host_sve_max_vl) - 1 ? > > Yeah, at that point we have no idea what any other cores might look like > and there's just generally a bootstrapping issue - we need to see the > actual maximum VLs for the PEs to work out what the maximum VL for the > system is so we can tell KVM what to enforce. That's fine. By the time KVM initialises, all the "early" CPUs will be on, and pKVM actively prevents any late onlining of CPUs. The only gotcha would be if "something" snapshots the "large" VL in between two CPU boots, but we really don't expect that sort of things. M. -- Without deviation from the norm, progress is not possible.