From: Marc Zyngier <maz@kernel.org>
To: Jianmin Lv <lvjianmin@loongson.cn>
Cc: Thomas Gleixner <tglx@linutronix.de>,
linux-kernel@vger.kernel.org, loongarch@lists.linux.dev,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
Huacai Chen <chenhuacai@loongson.cn>
Subject: Re: [PATCH V1 1/2] irqchip/loongson-pch-pic: Support to set irq type for ACPI path
Date: Wed, 28 Sep 2022 10:49:59 -0400 [thread overview]
Message-ID: <86leq37duw.wl-maz@kernel.org> (raw)
In-Reply-To: <1660615291-35409-2-git-send-email-lvjianmin@loongson.cn>
On Mon, 15 Aug 2022 22:01:30 -0400,
Jianmin Lv <lvjianmin@loongson.cn> wrote:
>
> For ACPI path, the translate callback used IRQ_TYPE_NONE and ignored
> the irq type in fwspec->param[1]. For supporting to set type for
> irqs of the irqdomain, fwspec->param[1] should be used to get irq
> type.
>
> On Loongson platform, the irq trigger type of PCI devices is
> high level, so high level triggered type is inputed to acpi_register_gsi
> when create irq mapping for PCI devices.
>
> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
> ---
> drivers/acpi/pci_irq.c | 3 ++-
> drivers/irqchip/irq-loongson-pch-pic.c | 10 ++++++----
> 2 files changed, 8 insertions(+), 5 deletions(-)
$ ./scripts/get_maintainer.pl drivers/acpi/pci_irq.c
Bjorn Helgaas <bhelgaas@google.com> (supporter:PCI SUBSYSTEM)
"Rafael J. Wysocki" <rafael@kernel.org> (supporter:ACPI)
Len Brown <lenb@kernel.org> (reviewer:ACPI)
linux-pci@vger.kernel.org (open list:PCI SUBSYSTEM)
linux-acpi@vger.kernel.org (open list:ACPI)
linux-kernel@vger.kernel.org (open list)
How about you start Cc-ing some of the relevant people?
>
> diff --git a/drivers/acpi/pci_irq.c b/drivers/acpi/pci_irq.c
> index 08e1577..34483b3 100644
> --- a/drivers/acpi/pci_irq.c
> +++ b/drivers/acpi/pci_irq.c
> @@ -393,7 +393,8 @@ int acpi_pci_irq_enable(struct pci_dev *dev)
> * controller and must therefore be considered active high
> * as default.
> */
> - int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ?
> + int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ||
> + acpi_irq_model == ACPI_IRQ_MODEL_LPIC ?
> ACPI_ACTIVE_HIGH : ACPI_ACTIVE_LOW;
The comment just above this only talks about ARM. Should it be
updated? Is this a limitation of the underlying interrupt controller?
> char *link = NULL;
> char link_desc[16];
> diff --git a/drivers/irqchip/irq-loongson-pch-pic.c b/drivers/irqchip/irq-loongson-pch-pic.c
> index b6f1392..5067010 100644
> --- a/drivers/irqchip/irq-loongson-pch-pic.c
> +++ b/drivers/irqchip/irq-loongson-pch-pic.c
> @@ -177,13 +177,15 @@ static int pch_pic_domain_translate(struct irq_domain *d,
> if (fwspec->param_count < 1)
> return -EINVAL;
>
> - if (of_node) {
> + if (of_node)
> *hwirq = fwspec->param[0] + priv->ht_vec_base;
> - *type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK;
> - } else {
> + else
> *hwirq = fwspec->param[0] - priv->gsi_base;
> +
> + if (fwspec->param_count > 1)
> + *type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK;
> + else
> *type = IRQ_TYPE_NONE;
Isn't that a change in behaviour if of_node is non-NULL and
param_count==1?
> - }
>
> return 0;
> }
This irqchip change should probably be a separate patch.
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2022-09-28 14:50 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-16 2:01 [PATCH V1 0/2] irqchip: Support to set irq type for ACPI path Jianmin Lv
2022-08-16 2:01 ` [PATCH V1 1/2] irqchip/loongson-pch-pic: " Jianmin Lv
2022-09-28 14:49 ` Marc Zyngier [this message]
2022-09-29 2:35 ` Jianmin Lv
2022-09-29 9:44 ` Marc Zyngier
2022-09-29 13:34 ` Jianmin Lv
2022-08-16 2:01 ` [PATCH V1 2/2] irqchip/loongson-liointc: " Jianmin Lv
2022-09-05 3:01 ` [PATCH V1 0/2] irqchip: " Jianmin Lv
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