From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 92DDA329C70 for ; Mon, 22 Dec 2025 10:42:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766400174; cv=none; b=HZyKg2M52IBp4kI2H+IK/c7z39Kb6UU+wTFt413gL7X64gGYHxBz5Rx3NNjK+aTBp8beG0VMlIa8HuiRfeqiSUk/gCMXhgdexkUOIcGP7/sU2GsKLXAGegIziHHvpM+xhcfyb2bHodkcagtmmd6SEOj9C5rMTF7PvbL56rV6EgY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766400174; c=relaxed/simple; bh=6vlXMU6z6K0HMeJhIapE1dXR5B/JRvOFa2zKw8jicRI=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=LQENZg4orHzRFWYuYdlIpAwMJCjNKGp+YtGVyBoYF9GQRjU/et3hdY74YNEUVGx6zL87tB2OO1H7G4f9O9Ha1lt++QAq53DwLFqJbzwYwIAxWzcVG4olsPdbjqVjdr8D5btfcp7SzMRkpzxyROGDW86WFQxmuXJjf8XRNilDTJ4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=N4y3DLU2; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="N4y3DLU2" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 14D9AC4CEF1; Mon, 22 Dec 2025 10:42:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1766400174; bh=6vlXMU6z6K0HMeJhIapE1dXR5B/JRvOFa2zKw8jicRI=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=N4y3DLU2kLFkglkNvZYbupCB8kOP9fo5Tl73biAXdGhRFfBYaIzH/HxNadBiZvuzU o7UUgb9FiNREbhD5+OJzxBibq4Cg73B/Gu8TY4gfCxar6JXmgSE6KhV0le4IrK9sDX c3n8PnOrP54gUYRbnLMCkO3/h50yrDP/UmIkO2eX7jkSAfl+J8NERHhDCMNw+LlfsJ x5GhKiF5PwKho3V30fDAJ+ie5CXeBvZafLF8OvbbX1nFoA5qv9v8Ezehv5kuYGFug9 exdZz4pQsJSCXAzI/goHQ0PjqjpIfo12qJB/Fi6l4SMFKfN5pzy46ugmu6/drVlJUh qVndqSTM3hbfA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1vXdNL-0000000EVeo-2ZmQ; Mon, 22 Dec 2025 10:42:51 +0000 Date: Mon, 22 Dec 2025 10:42:51 +0000 Message-ID: <86o6nqn6fo.wl-maz@kernel.org> From: Marc Zyngier To: Lorenzo Pieralisi Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel test robot , Thomas Gleixner Subject: Re: [PATCH] irqchip/gic-v5: Fix gicv5_its_map_event() ITTE read endianness In-Reply-To: <20251222102250.435460-1-lpieralisi@kernel.org> References: <20251222102250.435460-1-lpieralisi@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: lpieralisi@kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, lkp@intel.com, tglx@linutronix.de X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Mon, 22 Dec 2025 10:22:50 +0000, Lorenzo Pieralisi wrote: > > Kbuild bot (through sparse) reported that the ITTE read to carry out > a valid check in gicv5_its_map_event() lacks proper endianness handling. > > Fix it. > > Fixes: 57d72196dfc8 ("irqchip/gic-v5: Add GICv5 ITS support") > Reported-by: kernel test robot > Closes: https://lore.kernel.org/oe-kbuild-all/202512131849.30ZRTBeR-lkp@intel.com/ > Signed-off-by: Lorenzo Pieralisi > Cc: Thomas Gleixner > Cc: Marc Zyngier > --- > drivers/irqchip/irq-gic-v5-its.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/irqchip/irq-gic-v5-its.c b/drivers/irqchip/irq-gic-v5-its.c > index 554485f0be1f..8e22134b9f48 100644 > --- a/drivers/irqchip/irq-gic-v5-its.c > +++ b/drivers/irqchip/irq-gic-v5-its.c > @@ -849,7 +849,7 @@ static int gicv5_its_map_event(struct gicv5_its_dev *its_dev, u16 event_id, u32 > > itte = gicv5_its_device_get_itte_ref(its_dev, event_id); > > - if (FIELD_GET(GICV5_ITTL2E_VALID, *itte)) > + if (FIELD_GET(GICV5_ITTL2E_VALID, le64_to_cpu(*itte))) > return -EEXIST; > > itt_entry = FIELD_PREP(GICV5_ITTL2E_LPI_ID, lpi) | Acked-by: Marc Zyngier M. -- Without deviation from the norm, progress is not possible.