From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F2F4D1DFDE; Thu, 10 Apr 2025 07:10:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744269022; cv=none; b=PVnFxvJazZ7nruNuK2wBVzbqyIR9jix0Pfdt09wCmyCJ7By8XQM5wIJYvmdIMb5MwYQ9dc9HYmju1MFfB6a61fDVGVRxVLHPHJM9zYLhwxYJu86SOqbfQjr1CffYervUpNANBPYIknBlIF0SHbcs1ufjOV/rwSmnnwuS+Rxygvg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744269022; c=relaxed/simple; bh=3UX8skoZo+ARQ7Okmvw9x6n8F1ITBsNwvbv3/HWmeUE=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=RJB7H5W8O9r0SlTyZHSW26K5Vyt343GIQuuQ8sLEKLnKLHGo5SKtwJpgjX5ymVyT8yMgPnP/H0/PA9sdQOvr5I+RZSUdBnj68Tmf5T1Fnxl9bGVaGh9vbvJzwGv+0OKO8c3fFuugYB0buhpU3wGO4hXmQJL1EswnHX3m+yet5yM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=hXBrCYqs; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="hXBrCYqs" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 713CBC4CEDD; Thu, 10 Apr 2025 07:10:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1744269021; bh=3UX8skoZo+ARQ7Okmvw9x6n8F1ITBsNwvbv3/HWmeUE=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=hXBrCYqsgMzQcbFrHiZ0JRsTgOX+ZPdPtfQT4q61CsRf9BzycR5I9/ejUG97HT4HX j+sskasFQoCGl1x5/YBT/RO4ZSPjBHHhYP6WdJyextCf0IOptgI34S1LQ8NPQ00jb/ fjNw6rHqjzGfdPnEyGhaq5t+qWnNCoO7w5gcbzV0a9zlJfAyLevD9VEF5h+tBbXoWA tNcbvSw0+ToKHwSwCrrB+ecRphhZvRIwWPWKqeodA1+xcob/NqXHx0kHcznlLccfGb 7wN3/SOLUc+OYFkCzhbyte3A391j7ccFs+22EXbCOdHlrkoN7eweKOd2O9kBiccvN0 VWn8dcjDeMomw== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1u2m3G-0046ri-IJ; Thu, 10 Apr 2025 08:10:18 +0100 Date: Thu, 10 Apr 2025 08:10:18 +0100 Message-ID: <86o6x4lcf9.wl-maz@kernel.org> From: Marc Zyngier To: Krzysztof Kozlowski Cc: Vijay Balakrishna , Borislav Petkov , Tony Luck , James Morse , Mauro Carvalho Chehab , Robert Richter , linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, Tyler Hicks , Sascha Hauer Subject: Re: [PATCH 2/2] dt-bindings: arm: cpus: Add edac-enabled property In-Reply-To: <319b7c65-3e2f-456b-a845-45f7a57ba2c5@kernel.org> References: <1744241785-20256-1-git-send-email-vijayb@linux.microsoft.com> <1744241785-20256-3-git-send-email-vijayb@linux.microsoft.com> <319b7c65-3e2f-456b-a845-45f7a57ba2c5@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: krzk@kernel.org, vijayb@linux.microsoft.com, bp@alien8.de, tony.luck@intel.com, james.morse@arm.com, mchehab@kernel.org, rric@kernel.org, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, code@tyhicks.com, s.hauer@pengutronix.de X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Thu, 10 Apr 2025 07:00:55 +0100, Krzysztof Kozlowski wrote: > > On 10/04/2025 01:36, Vijay Balakrishna wrote: > > From: Sascha Hauer > > > > Some ARM Cortex CPUs like the A53, A57 and A72 have Error Detection And > > Correction (EDAC) support on their L1 and L2 caches. This is implemented > > in implementation defined registers, so usage of this functionality is > > not safe in virtualized environments or when EL3 already uses these > > registers. This patch adds a edac-enabled flag which can be explicitly > > set when EDAC can be used. > > Can't hypervisor tell you that? No, it can't. This is not an architecture feature, and KVM will gladly inject an UNDEF exception if the guest tries to use this. Which is yet another reason why this whole exercise is futile. M. -- Without deviation from the norm, progress is not possible.