From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A61D1C4332F for ; Mon, 19 Dec 2022 15:27:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232098AbiLSP11 (ORCPT ); Mon, 19 Dec 2022 10:27:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50258 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231783AbiLSP1Y (ORCPT ); Mon, 19 Dec 2022 10:27:24 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6BF2D6467 for ; Mon, 19 Dec 2022 07:27:23 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 2F6DFB80E53 for ; Mon, 19 Dec 2022 15:27:22 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D110BC433EF; Mon, 19 Dec 2022 15:27:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1671463640; bh=JMW0b8vWlwPAZKdyQQxW3qognqY1rfXtk72EWUCOkXo=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=aPk4RHrGseOyH9skuJulVohV+CFyLrm+dOlxl0w8315MBSQSCHaW0XXH3pbwSIsA3 7xe8mcgfOWEO9fQGfYgZ+Eg4x+v2TPw8GxAsmri0r5ofYbEJV8hdmTfObcKUpGLnpy LAfECG1u9g6UbaD7atsRqh/1KqNqxwHMmcqOaT0Q3sZDyWMqhuZ7I9S8azAtrx009t YuxzvceHLMkWp0I+mCvPDeX4gEDsWSDB0e2jkvST63IpWfLauI35bYOJmBYHZagq2c uAlfD2VE6H2r0v9kBEh05Na55SW9US+6EHavCLR9umx4B9xcGihvWR0QXBxg6nhoH4 JJIxCY0tDw3SA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1p7I2v-00DglG-TZ; Mon, 19 Dec 2022 15:27:18 +0000 Date: Mon, 19 Dec 2022 15:27:17 +0000 Message-ID: <86o7rzpg6i.wl-maz@kernel.org> From: Marc Zyngier To: Mark Brown Cc: Akihiko Odaki , linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, Mathieu Poirier , Oliver Upton , Suzuki K Poulose , Alexandru Elisei , James Morse , Will Deacon , Catalin Marinas , asahi@lists.linux.dev, Alyssa Rosenzweig , Sven Peter , Hector Martin Subject: Re: [PATCH v3 1/7] arm64/sysreg: Convert CCSIDR_EL1 to automatic generation In-Reply-To: References: <20221218051412.384657-1-akihiko.odaki@daynix.com> <20221218051412.384657-2-akihiko.odaki@daynix.com> <87cz8hez0i.wl-maz@kernel.org> <1ef32b0c-6cee-75f7-e1e0-ede1f5b9a016@daynix.com> <87bko0g8m2.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: broonie@kernel.org, akihiko.odaki@daynix.com, linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, mathieu.poirier@linaro.org, oliver.upton@linux.dev, suzuki.poulose@arm.com, alexandru.elisei@arm.com, james.morse@arm.com, will@kernel.org, catalin.marinas@arm.com, asahi@lists.linux.dev, alyssa@rosenzweig.io, sven@svenpeter.dev, marcan@marcan.st X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 19 Dec 2022 15:00:15 +0000, Mark Brown wrote: > > [1 ] > On Sun, Dec 18, 2022 at 01:11:01PM +0000, Marc Zyngier wrote: > > Akihiko Odaki wrote: > > > > arch/arm64/tools/gen-sysreg.awk does not allow a hole and requires all > > > bits are described hence these descriptions. If you have an > > > alternative idea I'd like to hear. > > > I'd simply suggest creating an UNKNOWN field encompassing bits > > [21:28]. Alternatively, feel free to try the patch below, which allows > > you to describe these 4 bits as "Unkn 31:28", similar to Res0/Res1. > > I agree, where practical we should add new field types and other > features as needed rather than trying to shoehorn things into what the > tool currently supports. It is very much a work in progress which can't > fully represent everything in the spec yet. For things like the > registers with multiple possible views it's much more effort which > shouldn't get in the way of progress on features but with something like > this just updating the tool so we can match the architecture spec is the > right thing. I was tempted to add a Namespace tag that wouldn't generate the sysreg #defines, but only generate the fields with a feature-specific namespace. For example: Sysreg CCSIDR_EL1 3 1 0 0 0 Res0 63:32 Unkn 31:28 Field 27:13 NumSets Field 12:3 Associativity Field 2:0 LineSize EndSysreg Namespace CCIDX CCSIDR_EL1 Res0 63:56 Field 55:32 NumSets Res0 31:25 Field 24:3 Associativity Field 2:0 LineSize EndSysreg the later generating: #define CCIDR_EL1_CCIDX_RES0 (GENMASK(63, 56) | GENMASK(31, 25)) #define CCIDR_EL1_CCIDX_NumSets GENMASK(55, 32) #define CCIDR_EL1_CCIDX_Associativity GENMASK(24, 3) #define CCIDR_EL1_CCIDX_LineSize GENMASK(2, 0) Thoughts? > > > Define an 'Unkn' field type modeled after the Res0/Res1 types > > to allow such description. This allows the generation of > > I'd be tempted to spell out Unknown fully since Unkn is not such a > common abbreviation but I can see the desire to keep the name shorter > and it doesn't really matter so either way: > > Reviewed-by: Mark Brown Yeah, this stuff is write-only most of the time, and I like my fields aligned if at all possible. Thanks, M. -- Without deviation from the norm, progress is not possible.