From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 247A01DDC36 for ; Wed, 11 Dec 2024 16:52:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733935973; cv=none; b=jMPBVAg709GQ+IRoBiV+8rPdv1x/q+yjSscwntHUu+NPZJrs7ve/1Mk0pN+pzr5NE3WfcTuJxwdwqje9WreFJQkx5bKnmgDqR7WBT5mWPkcJ847Gx31xjigAM04rnwm50wrJEeD0vWRwQLlHiLidpPNZOcIEPn2xvE6CkBsYITo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733935973; c=relaxed/simple; bh=wAVbop7TdJ/MDscbnuJebtK0QRx/SGfR8noM2AUSjwg=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=Cd4SrO3M+cF+dS/EFildTpzo38t1VWsXPOV/TjQ1uKQ5y03H8Xx5cutMvPY5zxhQuEkecyGxEJU1vrKMNfBi46TISr5LbJUE5hIOp4Uscii+L+awACQY0rWVhaq0w2f6/0xQnqPLl1o5B9vNnZpDws1I7ZqSTU0aVGgIESHMSeI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=HRnyGKFv; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="HRnyGKFv" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A6803C4CED2; Wed, 11 Dec 2024 16:52:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1733935972; bh=wAVbop7TdJ/MDscbnuJebtK0QRx/SGfR8noM2AUSjwg=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=HRnyGKFv7ltn2J5aIhUJipuG0pg5Xueu22dXzWyFOnN2tQ732FxaF7ygku45scGxn iFNJrYh9jyW7yoQRyhCkqhrmTaDDf9jdQKO5oz9968s64iR6d7tGCWTkMEfx6MmY10 mYtSNJgWLhDOcWI7TxEXiLkHiljPPfxfJfxxwBP7fLNmQ5eKU6MIuIZHfqZPSFS7Sx 3Fqz/9muX/I1V4HXxsx4Guk4qbdZXpc0r/xdZ9W9PBAQ9Pfg4xq+jBFmi/Vj9WxhT7 WoeT3b1ixMXh0tD3bVaBR83r6QEt5inQW3xfrA60MzVto6SlfnN3xJIRDS1SLR+J8b R93LpRdcl8jjQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1tLPxC-002kk5-A3; Wed, 11 Dec 2024 16:52:50 +0000 Date: Wed, 11 Dec 2024 16:52:49 +0000 Message-ID: <86pllyrwke.wl-maz@kernel.org> From: Marc Zyngier To: =?UTF-8?B?TWlrb8WCYWo=?= Lenczewski Cc: catalin.marinas@arm.com, will@kernel.org, corbet@lwn.net, oliver.upton@linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, linux-arm-kernel@lists.infradead.org, liunx-doc@vger.kernel.org, linux-kernel@vger.kernel.org, kvmarm@vger.kernel.org Subject: Re: [RFC PATCH v1 3/5] arm64: Add errata and workarounds for systems with broken BBML2 In-Reply-To: <20241211154611.40395-4-miko.lenczewski@arm.com> References: <20241211154611.40395-1-miko.lenczewski@arm.com> <20241211154611.40395-4-miko.lenczewski@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: miko.lenczewski@arm.com, catalin.marinas@arm.com, will@kernel.org, corbet@lwn.net, oliver.upton@linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, linux-arm-kernel@lists.infradead.org, liunx-doc@vger.kernel.org, linux-kernel@vger.kernel.org, kvmarm@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Wed, 11 Dec 2024 15:45:04 +0000, Miko=C5=82aj Lenczewski wrote: >=20 > There are systems which claim support for BBML2, but whose > implementation of this support is broken. Add a Kconfig erratum for each > of these systems, and a cpufeature workaround that forces the supported > BBM level on these systems to 0. >=20 > Signed-off-by: Miko=C5=82aj Lenczewski > --- > Documentation/arch/arm64/silicon-errata.rst | 32 ++++ > arch/arm64/Kconfig | 164 ++++++++++++++++++++ > arch/arm64/kernel/cpufeature.c | 32 +++- > 3 files changed, 227 insertions(+), 1 deletion(-) >=20 > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > index 100570a048c5..9ef8418e8410 100644 > --- a/arch/arm64/Kconfig > +++ b/arch/arm64/Kconfig > @@ -1127,6 +1127,170 @@ config ARM64_ERRATUM_3194386 > =20 > If unsure, say Y. > =20 > +config ARM64_WORKAROUND_BROKEN_BBML2_SUPPORT > + bool > + > +config ARM64_ERRATUM_3696250 > + bool "Neoverse-N2: workaround for broken BBM level 2 support" > + default y > + select ARM64_WORKAROUND_BROKEN_BBML2_SUPPORT > + help > + Affected Neoverse-N2 cores (r0p0, r0p1, r0p2, r0p3) declare So you list a number of affected revisions... [...] > +static bool has_bbml2(const struct arm64_cpu_capabilities *entry, > + int scope) > +{ > + if (IS_ENABLED(CONFIG_ARM64_WORKAROUND_BROKEN_BBML2_SUPPORT)) { > + static const struct midr_range broken_bbml2_list[] =3D { > + MIDR_ALL_VERSIONS(MIDR_CORTEX_A76), > + MIDR_ALL_VERSIONS(MIDR_CORTEX_A77), > + MIDR_ALL_VERSIONS(MIDR_CORTEX_A78), > + MIDR_ALL_VERSIONS(MIDR_CORTEX_A78C), > + MIDR_ALL_VERSIONS(MIDR_CORTEX_A710), > + MIDR_ALL_VERSIONS(MIDR_CORTEX_X1), > + MIDR_ALL_VERSIONS(MIDR_CORTEX_X2), > + MIDR_ALL_VERSIONS(MIDR_CORTEX_X3), > + MIDR_ALL_VERSIONS(MIDR_CORTEX_X4), > + MIDR_ALL_VERSIONS(MIDR_CORTEX_X925), > + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1), > + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2), > + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1), > + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2), > + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3), > + {} ... and yet you flag all versions as broken? So which one is it? If it is really the case that all versions are broken, then the text should be simplified. Otherwise, this should really list the broken versions. The other thing is that I find it incredibly dangerous to rely on some config option to disable a feature that will absolutely eat your data if it is broken. I'd rather see the whole BBM-L2 being behind an option, and unconditionally check for b0rken CPUs. Specially when it looks like there isn't a single CPU on the planet that implemented the feature correctly... :-/ Thanks, M. --=20 Without deviation from the norm, progress is not possible.