From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 64E4F12FF9F; Tue, 6 Feb 2024 12:54:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707224092; cv=none; b=jtzTs/YHE/YQd0FynmsG7wAAwNPdVdkYnL6M5XB5KwXGnIIe1codoxbrRmsDSjjIBhWeaAf0zy1SKjp3wdEiUGBQw7zzQCU5kg67/pLbGm4Y6AXQ5nuR7ZyIoPaY8B+0fYYsAyopDDa9F98UkcTD0Aahf70THaT9t9NY0i+Spn8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707224092; c=relaxed/simple; bh=5zDs4bCJCg9fhWhJufayFel6oMRJyIadeFkzq2VZtnM=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=JjNC59RIwmKbDKIkXySV4Pt1uQWeY5q6XIuzNB6UUh7KNpzJCyGSfZd9sc8masd8IKwZQkyWyNVhEDbBN3QD5tAo0mOmPczKwntqKguzJ8kkKvHzQUza3u0mh6jn2my/Fy6tKojkT5ZpwGLRgCLjLJSsGuxF8EfB2i2Iy42J3i0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=bU+oRkTq; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="bU+oRkTq" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C2464C433F1; Tue, 6 Feb 2024 12:54:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707224091; bh=5zDs4bCJCg9fhWhJufayFel6oMRJyIadeFkzq2VZtnM=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=bU+oRkTqb1zaIpJ1yo9/YCK+2iXPfc+d0U0jKNJWzCFE7GnIfe9Bji/nrJiiNoUSo 4bzbxjgsemqG4MJ4P3/4XQLnxl9qlgNlMkbq8f9kCgQIVCgcDwa4lj3UbbxsmX/7Ja Vz16y745ziRgIcvNkGuUdTTDHgvAcvxF/mqcgfdEh4rpzX0ezNXhH7upMoYirEXuT0 6/kop5ZKomX9TAJs5jVVESQZojkmH+mfFxku4dgU1WTmjj67coF1utCvXsM28WcX5z SQSle5w+ShMKQTzhwnBFsHbFfp70z5Jsqvspw1ZfC0xDwSz9K9Tg7tyP+Ewo4Ek1JY 36/KQutHmdwkA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1rXKyP-000ocS-He; Tue, 06 Feb 2024 12:54:49 +0000 Date: Tue, 06 Feb 2024 12:54:48 +0000 Message-ID: <86ttml69d3.wl-maz@kernel.org> From: Marc Zyngier To: Jon Hunter Cc: Sumit Gupta , treding@nvidia.com, krzysztof.kozlowski@linaro.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org, amhetre@nvidia.com, bbasu@nvidia.com Subject: Re: [Patch] memory: tegra: Skip SID override from Guest VM In-Reply-To: References: <20240206114852.8472-1-sumitg@nvidia.com> <86wmrh6b2n.wl-maz@kernel.org> <252d6094-b2d6-496d-b28f-93507a193ede@nvidia.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: jonathanh@nvidia.com, sumitg@nvidia.com, treding@nvidia.com, krzysztof.kozlowski@linaro.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org, amhetre@nvidia.com, bbasu@nvidia.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Tue, 06 Feb 2024 12:51:35 +0000, Jon Hunter wrote: >=20 >=20 > On 06/02/2024 12:28, Jon Hunter wrote: >=20 > ... >=20 > >> - My own tegra186 HW doesn't have VHE, since it is ARMv8.0, and this > >> =C2=A0=C2=A0 helper will always return 'false'. How could this result = in > >> =C2=A0=C2=A0 something that still works? Can I get a free CPU upgrade? > >=20 > > I thought this API just checks to see if we are in EL2? >=20 >=20 > Sorry to add a bit more info, I see EL2 is used for hypervisor [0], > but on my Tegra186 with no hypervisor I see ... >=20 > CPU: All CPU(s) started at EL2 Yes. and yet the kernel runs at EL1 (on ARMv8.0, we can't run the kernel at EL2 at all). M. --=20 Without deviation from the norm, progress is not possible.