From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 706CFC4332F for ; Wed, 9 Nov 2022 18:21:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230156AbiKISU6 (ORCPT ); Wed, 9 Nov 2022 13:20:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47246 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230253AbiKISUy (ORCPT ); Wed, 9 Nov 2022 13:20:54 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BBDDE2792B for ; Wed, 9 Nov 2022 10:20:53 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 2EDFDB81F68 for ; Wed, 9 Nov 2022 18:20:52 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C903EC433D7; Wed, 9 Nov 2022 18:20:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668018050; bh=f5WlHtCUdeO7PC5hRQWApPE/3DDUhlTy4X6KcKfHhRw=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=q8tEza9EH03A9jm31HJ+DkmPpQ/zxCBOtWGbsvKF++IJQ7LfDuBwHHvcZahw1AfJa l4RkvQI/Y7D9iScCHGejKiI3z/OAWV2+T+DvpEUnHU6F6hDueaMTA0TzlrziC6Iliv xHMOQBscXmFvnlbB7R/6F63XR0fbski+pqCOnE01nTDi2BlXkrONvNmwJJ3KO33UiE ryHrdwkGxQ93COXutnPLtpNoNISqXRnYiNlgrjqn8mOh9ZzmvUQ1HyvWPgHcPRwNUn 0GNnqGKFZLjYzXMA9UHI0PbBXlQwauCnQLNp9c0ErKwj0DcNIqP4ZT1+TI2dOsnFSp JxA56lW2a1Xpg== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1ospgu-004ynk-I5; Wed, 09 Nov 2022 18:20:48 +0000 Date: Wed, 09 Nov 2022 18:20:48 +0000 Message-ID: <86tu38oupr.wl-maz@kernel.org> From: Marc Zyngier To: Mukesh Ojha Cc: , , , Thomas Gleixner , lkml Subject: Re: Query on handling some special Group0 interrupt in Linux In-Reply-To: References: User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: quic_mojha@quicinc.com, linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com, will@kernel.org, tglx@linutronix.de, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 09 Nov 2022 16:20:35 +0000, Mukesh Ojha wrote: > > Hi, > > I was working on a use case where both el2/el3 are implemented and we > have a watchdog interrupt (SPI), which is used for detecting software > hangs and cause device reset; If that interrupt's current cpu affinity > is on a core, where interrupts are disabled, we won't be able to serve > it or if this interrupt comes on a core which has interrupt enabled, > calling panic() or with smp_send_stop(), we would not be able > to know the call stack of the other cores which is running with > interrupt disabled. > > I was thinking of configuring both a watchdog irq(SPI) and IPI_STOP > (SGI) or any reserve IPI as an FIQ. And from the watchdog irq handler, > I was thinking of calling panic() which eventually sends IPI_STOP(SGI > FIQ) to all the cores. And with this we will able to dump all the core > call stack. > > I am able to achieve this but wanted to know if this is acceptable to > the community to support/allow such use cases like above and enable > group0 interrupt from GIC for some special use cases. For a start, we only deal with Group-1 interrupts in Linux. Group-0 interrupts are for the firmware, and we really don't want to see them (this is consistent with your HW having EL3). We also mask IRQ and FIQ at the same time, so this is a non-starter. If you want to be able to deliver an interrupt while the interrupts are masked, what you are looking for is the NMI framework, for which you can register SPIs as (pseudo-)NMI. This is of course assuming that you're using GICv3. If you're using an older version of the architecture, we don't have a good solution for you, unfortunately. Thanks, M. -- Without deviation from the norm, progress is not possible.