From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82734C65BAE for ; Thu, 13 Dec 2018 17:26:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4723620870 for ; Thu, 13 Dec 2018 17:26:30 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4723620870 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729651AbeLMR03 (ORCPT ); Thu, 13 Dec 2018 12:26:29 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:39090 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728075AbeLMR03 (ORCPT ); Thu, 13 Dec 2018 12:26:29 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6F65DA78; Thu, 13 Dec 2018 09:26:28 -0800 (PST) Received: from big-swifty.misterjones.org (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3D39E3F575; Thu, 13 Dec 2018 09:26:20 -0800 (PST) Date: Thu, 13 Dec 2018 17:26:16 +0000 Message-ID: <86tvjhbao7.wl-marc.zyngier@arm.com> From: Marc Zyngier To: Srinivas Kandagatla Cc: sudeep.holla@arm.com, tglx@linutronix.de, jason@lakedaemon.net, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, rnayak@codeaurora.org, sboyd@kernel.org, bjorn.andersson@linaro.org, nicolas.dechesne@linaro.org, ctatlor97@gmail.com, vkoul@kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v5 4/4] arm64: dts: add msm8996 compatible to gicv3 In-Reply-To: <20181210135633.30283-5-srinivas.kandagatla@linaro.org> References: <20181210135633.30283-1-srinivas.kandagatla@linaro.org> <20181210135633.30283-5-srinivas.kandagatla@linaro.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.8 EasyPG/1.0.0 Emacs/25.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Organization: ARM Ltd MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 10 Dec 2018 13:56:33 +0000, Srinivas Kandagatla wrote: > > Add compatible to gicv3 node to enable quirk required to restrict writing > to GICR_WAKER register which is restricted on msm8996 SoC in Hypervisor. > > With this quirk MSM8996 can at least boot out of mainline, which can help > community to work with boards based on MSM8996. > > Without this patch Qualcomm DB820c board reboots on mainline. > > Signed-off-by: Srinivas Kandagatla > --- > arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi > index 8585c61e32ef..cd9650cea05d 100644 > --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi > @@ -404,7 +404,7 @@ > }; > > intc: interrupt-controller@9bc0000 { > - compatible = "arm,gic-v3"; > + compatible = "qcom,msm8996-gic-v3", "arm,gic-v3"; > #interrupt-cells = <3>; > interrupt-controller; > #redistributor-regions = <1>; I've applied the first 3 patches to irqchip/next. Please route this one via arm-soc. Thanks, M. -- Jazz is not dead, it just smell funny.