From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B4ADD270ECE for ; Mon, 19 May 2025 10:15:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747649722; cv=none; b=mnfKzEIfn2AsH1V/A/lpc36FO/OrHVKhN9tfn4nYzksnRoffchwBZQZ67OU+JjepKC+9Mg43rMRrsa0kk/SI0lHj7L2lz5gPzSixYZJcBn62EAcExLhrUlL4pALzS3scxl231+Bcxpe4+d9EIK7ld7YVs3puS5fsgzsT45HCv1I= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747649722; c=relaxed/simple; bh=zmhle5L+4+qv5m22mzveX9dJEVdEfimEphe3FmWOtr8=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=ifnnmkHLnmOZZT2GEGUqO6Evd+xjSV9jgeit1t34OefIKZBlCGbUwXr33HWkvjzXcpmLQErLeKxqytg2VPhCCjyW3SDf80ijtLp+/euSifFkhFIhLy76qFmrWBzDadGKKAtSbY8ySkTUAkq12TUNB+dgSG4MOhs1VuvDBUoZfmE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=OStWKLtH; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OStWKLtH" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8D772C4CEE4; Mon, 19 May 2025 10:15:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747649722; bh=zmhle5L+4+qv5m22mzveX9dJEVdEfimEphe3FmWOtr8=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=OStWKLtHJDkSh0hLs02gQ1/jU2XchxaiFeDsGaMlxlzVC5TuBUOz3r3f2jLnZuloi ymoBk1vhbSaIOejWtSyD36oT1/Ufe9wLNTbb+vhhJpgtGp6qAzMzPRoziS4e3w9pF+ NSh36GDfBLryuH7whCKq2DgzNYlnThMgkE9oMtMwlvcAxVZs2eAvtthH3X/QoTsU11 XPM5jgWT5O5ziBdafdfrt9cBHR9SijBsRruSroKuRSH1mpkrs1xGvQc+qTl4bJ+LxQ 3XoQzBTXkkx9ZrTtWe6Ba4WbACCFAq2tXFXWvfrZVYRgk+cHEA7easbOwvNWanbU8T BFG2O4R/VPnDw== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1uGxWi-00GByQ-CG; Mon, 19 May 2025 11:15:20 +0100 Date: Mon, 19 May 2025 11:15:20 +0100 Message-ID: <86wmacewjr.wl-maz@kernel.org> From: Marc Zyngier To: Thomas Gleixner Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Lorenzo Pieralisi , Sascha Bischoff , Timothy Hayes Subject: Re: [PATCH v2 5/5] irqchip/gic-v3-its: Use allocation size from the prepare call In-Reply-To: <8734d1iwcp.ffs@tglx> References: <20250513163144.2215824-1-maz@kernel.org> <20250513163144.2215824-6-maz@kernel.org> <8734d1iwcp.ffs@tglx> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: tglx@linutronix.de, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, lpieralisi@kernel.org, sascha.bischoff@arm.com, timothy.hayes@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Sun, 18 May 2025 19:53:42 +0100, Thomas Gleixner wrote: > > On Tue, May 13 2025 at 17:31, Marc Zyngier wrote: > > > Now that .msi_prepare() gets called at the right time and not > > with semi-random parameters, remove the ugly hack that tried > > to fix up the number of allocated vectors. > > > > It is now correct by construction. > > FWIW, while looking at something related, it occured to me that with > this change you can enable MSI_FLAG_PCI_MSIX_ALLOC_DYN now on GIC ITS. Maybe. It is rather unclear to me what this "dynamic allocation" actually provides in terms of guarantees to the endpoint driver. M. -- Without deviation from the norm, progress is not possible.