From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 13C24CD5BCA for ; Tue, 19 Sep 2023 14:38:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232862AbjISOiE (ORCPT ); Tue, 19 Sep 2023 10:38:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232839AbjISOiC (ORCPT ); Tue, 19 Sep 2023 10:38:02 -0400 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DB830DD; Tue, 19 Sep 2023 07:37:55 -0700 (PDT) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7B1B9C433C9; Tue, 19 Sep 2023 14:37:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1695134275; bh=1TaWCZNoPq8zp5zivoxn5Dx64qb8nTY8ohOKGZ1yRPQ=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=Jl47SgJxEDI+U96MxIFJ0y5rUH5DKc0+XO0O3nxQO9OLjgiY78jFp0y+915n8+eeW lgvJS/uQV1OVu8epHZRPXjxAGzxwBm0rmtZ3E+UwsgeR3jLDTPHujJL6sxUAYJEAwU SxtEhB3b/fUXsIfSOcpNO99T+sClBMy9F2gUnItSdcEU8ENO6M/bTy99xDUxx1tUE7 60dlR3zt8xQlnFhCMYYRARfoqVmcLa22pQaYx+MXCsPR8I3MfrIiV0ggFqIS2Mnee8 1N+aSeCSuKjt4UPeqa2UHK4I+FEgIOU9hyrJw6t2LNh47+wrMX2Tkad5Kfvm2efFNH ULhWi11IXPooA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1qibrN-00EMkx-4Z; Tue, 19 Sep 2023 15:37:53 +0100 Date: Tue, 19 Sep 2023 15:37:52 +0100 Message-ID: <86y1h2cjpb.wl-maz@kernel.org> From: Marc Zyngier To: Biju Das Cc: Thomas Gleixner , Lad Prabhakar , Claudiu Beznea , Geert Uytterhoeven , Biju Das , linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: Re: [PATCH 3/3] irqchip: renesas-rzg2l: Fix irq storm with edge trigger detection for TINT In-Reply-To: <20230918122411.237635-4-biju.das.jz@bp.renesas.com> References: <20230918122411.237635-1-biju.das.jz@bp.renesas.com> <20230918122411.237635-4-biju.das.jz@bp.renesas.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: biju.das.jz@bp.renesas.com, tglx@linutronix.de, prabhakar.mahadev-lad.rj@bp.renesas.com, claudiu.beznea.uj@bp.renesas.com, geert+renesas@glider.be, biju.das.au@gmail.com, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 18 Sep 2023 13:24:11 +0100, Biju Das wrote: > > In case of edge trigger detection, enabling the TINT source causes a > phantum interrupt that leads to irq storm. So clear the phantum interrupt > in rzg2l_irqc_irq_enable(). > > This issue is observed when the irq handler disables the interrupts using > disable_irq_nosync() and scheduling a work queue and in the work queue, > re-enabling the interrupt with enable_irq(). > > Fixes: 3fed09559cd8 ("irqchip: Add RZ/G2L IA55 Interrupt Controller driver") > Signed-off-by: Biju Das > Tested-by: Claudiu Beznea > --- > drivers/irqchip/irq-renesas-rzg2l.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/irqchip/irq-renesas-rzg2l.c b/drivers/irqchip/irq-renesas-rzg2l.c > index 33a22bafedcd..78a9e90512a6 100644 > --- a/drivers/irqchip/irq-renesas-rzg2l.c > +++ b/drivers/irqchip/irq-renesas-rzg2l.c > @@ -144,6 +144,12 @@ static void rzg2l_irqc_irq_enable(struct irq_data *d) > reg = readl_relaxed(priv->base + TSSR(tssr_index)); > reg |= (TIEN | tint) << TSSEL_SHIFT(tssr_offset); > writel_relaxed(reg, priv->base + TSSR(tssr_index)); > + /* > + * In case of edge trigger detection, enabling the TINT source > + * cause a phantum interrupt that leads to irq storm. So clear > + * the phantum interrupt. > + */ > + rzg2l_tint_eoi(d); This looks incredibly unsafe. disable_irq()+enable_irq() with an interrupt being made pending in the middle, and you've lost that interrupt. What prevents this scenario? M. -- Without deviation from the norm, progress is not possible.