From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7DAB9307AF0 for ; Wed, 18 Feb 2026 11:04:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771412674; cv=none; b=IhMDPLe0GSdBfqRnFpU2ozwqDRhfSOo2BJeguRwKP0FxAcNeRr39BFVePa2l9n3wR7Nc6PuA9tyzUeQ1LF/zkx7Ir28BLkaBPkjjtJT3MSDLW9+Og7V6z4Yi+G8nnWlDFZjcH+0UjVRzv2h/Yfh9AlnDAzVIW+I77+9o7Lp/Et8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771412674; c=relaxed/simple; bh=8uHup8BbNvdZw84Ns0H98yJiWiGuyOerlrzGS9OHGak=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=RjNax1gonG7SbRPqR5vwNctXRyR6xIUMAMRYyzPXHhWKnazpVXD1Q9aVVvMIB+g6L0/p7TW2wxn0m5lGt2SqWrYvT5Boi5c/uU+InnP8vqwQaijThjwOWHvr/iLomuK/igusN+Lxe30E8s1lGXDDY0UscrAq9hMPC8Hgng7Y+zw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=oP7kI9t9; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="oP7kI9t9" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0CC6EC19421; Wed, 18 Feb 2026 11:04:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771412674; bh=8uHup8BbNvdZw84Ns0H98yJiWiGuyOerlrzGS9OHGak=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=oP7kI9t9/0ZBqJKbI5aDZ1JRMBizKe/nfgaTz63P/Yy/9JtE1J5aDV3m/xJE7jsPr JPAWnPX5cn+5dxUdJfILpiTbRTqE0oy74UtmCybzgv+WWEQfqllm7DFVU9OiDZoj0T D1yDFPfz7tdOXpuHvlwf56tcpLA+2ZB/F+EfSmI9/0Brm3duHdATjW6Agr4+eaYpxn ZueE4CcywhmhVrqU9IdlTaK8LHl8eAnKtasPjdasasXkcDJXTVG6xDTY5qtZjC+sFG 5GDVQ0yd/c5ISn9VlmE6x2lg5UPPphShwqFwDhugAQSsjdr0KrgVKVnourcvH7v4Ph quqhv5i6wI6vg== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1vsfM7-0000000Brxb-23yL; Wed, 18 Feb 2026 11:04:31 +0000 Date: Wed, 18 Feb 2026 11:04:31 +0000 Message-ID: <86zf569utc.wl-maz@kernel.org> From: Marc Zyngier To: Meghana Malladi Cc: MD Danish Anwar , Grzegorz Jaszczyk , Suman Anna , David Lechner , Roger Quadros , "Andrew F. Davis" , Thomas Gleixner , , , , Subject: Re: [PATCH 3/3] irqchip/irq-pruss-intc: Fix processing of IEP interrupts In-Reply-To: <0968172c-4c41-4157-a13f-bad3dec677a9@ti.com> References: <20230919061900.369300-1-danishanwar@ti.com> <20230919061900.369300-4-danishanwar@ti.com> <87ediu4nzs.wl-maz@kernel.org> <0968172c-4c41-4157-a13f-bad3dec677a9@ti.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: m-malladi@ti.com, danishanwar@ti.com, grzegorz.jaszczyk@linaro.org, s-anna@ti.com, david@lechnology.com, rogerq@kernel.org, afd@ti.com, tglx@linutronix.de, linux-kernel@vger.kernel.org, srk@ti.com, r-gunasekaran@ti.com, vigneshr@ti.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Wed, 18 Feb 2026 07:08:45 +0000, Meghana Malladi wrote: > > Hi Marc, > > On 9/19/23 13:02, Marc Zyngier wrote: > > On Tue, 19 Sep 2023 07:19:00 +0100, > > MD Danish Anwar wrote: > >> > >> From: Suman Anna > >> > >> It was discovered that IEP capture/compare IRQs (event #7 on all SoCs > >> and event #56 on K3 SoCs) are always triggered twice when PPS is > >> generated and CMP hit event detected by IEP. > >> > >> An example of the problem is: > >> pruss_intc_irq_handler > >> generic_handle_irq > >> handle_level_irq > >> mask_ack_irq -> IRQ 7 masked and asked in INTC, > >> but it's not yet cleared on HW level > >> handle_irq_event() > >> > >> icss_iep_cap_cmp_handler() -> IRQ 7 is actually processed in HW > >> irq_finalize_oneshot() > >> unmask_irq() > >> pruss_intc_irq_unmask() -> IRQ 7 status is still observed as set > >> > >> The solution is to actually ack these IRQs from pruss_intc_irq_unmask() > >> after the IRQ source is cleared in HW. > > > > What you don't explain is whether the interrupt is level or edge > > triggered? If it is level, then the "quirk" is that the interrupt > > controller is slow to recognise that the level has changed. If it is > > edge, this is a guaranteed recipe to lose interrupts. > > > > These are level IRQs, but INTC has latency detecting the source > deassertion, causing the double delivery (The hardware keeps the event > asserted until cleared in IEP) - I will add more details about this > fix in the commit message for v2. I'm sorry, but this comes almost 3 years late, and I've long forgotten about all of this. I can only conclude that if you (TI, not you personally) waited for this long to address my comments, then this is probably not something we really need to care about. Thanks, M. -- Without deviation from the norm, progress is not possible.