From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 353723264CF for ; Tue, 24 Mar 2026 20:21:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774383665; cv=none; b=TGnMCS4syk8xhWJXLEpsrtzEr+ZMLpZxzP6b43O8s6rk/6daZkv6ZOxGCQwFb4if+5dEm8HIt/r4yWo+zbnZs0fdEljDvGHAOI7ag5VhwozjrRqZjekd448WOo9tNeVbNk1sW4LDKkJUfoWFmZF+5vZ0PQOfbRPavWt0A/bhtIk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774383665; c=relaxed/simple; bh=/NhSz1JCEbhArPNqkK90KVktKyDjT49i4fpQkpGHoMQ=; h=From:To:Cc:Subject:In-Reply-To:References:Date:Message-ID: MIME-Version:Content-Type; b=ZHMeel2+TFk4rLkSeVs7UWrBEaAan6ViEH88u1NjlragX8Whsf7ieDj1/q+5+uqII9iufEBTEsFTxhtTa5LCh8DfUI+J2ckhP4igKDeiKqAlQo+08XzxoaTkvBLS1+Bk9l4szIliKIAvggrw1Cl/G19to4hPwYxHdYnKLcDTNeg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=EYlPxmZ/; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="EYlPxmZ/" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0118FC19424; Tue, 24 Mar 2026 20:21:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1774383664; bh=/NhSz1JCEbhArPNqkK90KVktKyDjT49i4fpQkpGHoMQ=; h=From:To:Cc:Subject:In-Reply-To:References:Date:From; b=EYlPxmZ/RUw+R3aJtXex137ONFDask4W4As4a+030ZDTL6E6ipB0hrefQWMmc18MC 0cVAk5Nc2yxsa0o118bR6Cgh2aW25YUjfYxncEUPqJwI9PXsEVxAmmvj0KO4i3/S5I QNUhyP0Dcw6PZiG6hXxQkM8FyoLLDtWsLzGzhHzT23Txkypfh79GIlkmsmWOKQYer8 RRA49zZza1hU58R8ASUDMTI8UF3UUB0XKV0OV2sUWTfVcQv1J+4Em9hGf8UiwiaDlj D9RgZQqSKEa4QMM8Ee4DkcjBdiFyef2MF8Xi5l2tN8EuzziQdZoeoZgTctWvdFd3JF orJQYVSC97xFQ== From: Thomas Gleixner To: Radu Rendec , LKML Cc: x86@kernel.org, Dmitry Ilvokhin , Neil Horman , Florian Fainelli Subject: Re: [patch v2 04/14] x86/irq: Make irqstats array based In-Reply-To: <874im5gfzp.ffs@tglx> References: <20260320131108.344376329@kernel.org> <20260320132102.297759330@kernel.org> <874im5gfzp.ffs@tglx> Date: Tue, 24 Mar 2026 21:21:00 +0100 Message-ID: <871ph9ges3.ffs@tglx> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Tue, Mar 24 2026 at 20:54, Thomas Gleixner wrote: > On Mon, Mar 23 2026 at 15:24, Radu Rendec wrote: >> On Fri, 2026-03-20 at 14:21 +0100, Thomas Gleixner wrote: >>> =C2=A0arch/x86/include/asm/hardirq.h=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 |=C2= =A0=C2=A0 69 +++++----- >> >> I believe this breaks scripts/gdb/linux/interrupts.py, particularly the >> x86_show_irqstat() function, which still expects individual members in >> struct irq_cpustat_t. > > Uurg. I did not even know this exists. Let me try to polish the snake. Something like the below should work, now I have to figure out how to test it. ---- --- a/scripts/gdb/linux/interrupts.py +++ b/scripts/gdb/linux/interrupts.py @@ -97,8 +97,8 @@ irq_desc_type =3D utils.CachedType("struct text +=3D "%*s: %10u\n" % (prec, "ERR", cnt['counter']) return text =20 -def x86_show_irqstat(prec, pfx, field, desc): - irq_stat =3D gdb.parse_and_eval("&irq_stat") +def x86_show_irqstat(prec, pfx, idx, desc): + irq_stat =3D gdb.parse_and_eval("&irq_stat.counts[IRQ_COUNT_%s]" %idx) text =3D "%*s: " % (prec, pfx) for cpu in cpus.each_online_cpu(): stat =3D cpus.per_cpu(irq_stat, cpu) @@ -118,32 +118,51 @@ irq_desc_type =3D utils.CachedType("struct text =3D x86_show_irqstat(prec, "NMI", '__nmi_count', 'Non-maskable in= terrupts') =20 if constants.LX_CONFIG_X86_LOCAL_APIC: - text +=3D x86_show_irqstat(prec, "LOC", 'apic_timer_irqs', "Local = timer interrupts") - text +=3D x86_show_irqstat(prec, "SPU", 'irq_spurious_count', "Spu= rious interrupts") - text +=3D x86_show_irqstat(prec, "PMI", 'apic_perf_irqs', "Perform= ance monitoring interrupts") - text +=3D x86_show_irqstat(prec, "IWI", 'apic_irq_work_irqs', "IRQ= work interrupts") - text +=3D x86_show_irqstat(prec, "RTR", 'icr_read_retry_count', "A= PIC ICR read retries") + text +=3D x86_show_irqstat(prec, "LOC", 'APIC_TIMER', "Local timer= interrupts") + text +=3D x86_show_irqstat(prec, "SPU", 'SPURIOUS', "Spurious inte= rrupts") + text +=3D x86_show_irqstat(prec, "PMI", 'APIC_PERF', "Performance = monitoring interrupts") + text +=3D x86_show_irqstat(prec, "IWI", 'IRQ_WORK', "IRQ work inte= rrupts") + text +=3D x86_show_irqstat(prec, "RTR", 'ICR_READ_RETRY', "APIC IC= R read retries") if utils.gdb_eval_or_none("x86_platform_ipi_callback") is not None: - text +=3D x86_show_irqstat(prec, "PLT", 'x86_platform_ipis', "= Platform interrupts") + text +=3D x86_show_irqstat(prec, "PLT", 'X86_PLATFORM_IPI', "P= latform interrupts") =20 if constants.LX_CONFIG_SMP: - text +=3D x86_show_irqstat(prec, "RES", 'irq_resched_count', "Resc= heduling interrupts") - text +=3D x86_show_irqstat(prec, "CAL", 'irq_call_count', "Functio= n call interrupts") - text +=3D x86_show_irqstat(prec, "TLB", 'irq_tlb_count', "TLB shoo= tdowns") + text +=3D x86_show_irqstat(prec, "RES", 'RESCHEDULE', "Reschedulin= g interrupts") + text +=3D x86_show_irqstat(prec, "CAL", 'CALL_FUNCTION', "Function= call interrupts") + + text +=3D x86_show_irqstat(prec, "TLB", 'TLB', "TLB shootdowns") =20 if constants.LX_CONFIG_X86_THERMAL_VECTOR: - text +=3D x86_show_irqstat(prec, "TRM", 'irq_thermal_count', "Ther= mal events interrupts") + text +=3D x86_show_irqstat(prec, "TRM", 'THERMAL_APIC', "Thermal e= vents interrupts") =20 if constants.LX_CONFIG_X86_MCE_THRESHOLD: - text +=3D x86_show_irqstat(prec, "THR", 'irq_threshold_count', "Th= reshold APIC interrupts") + text +=3D x86_show_irqstat(prec, "THR", 'THRESHOLD_APIC', "Thresho= ld APIC interrupts") =20 if constants.LX_CONFIG_X86_MCE_AMD: - text +=3D x86_show_irqstat(prec, "DFR", 'irq_deferred_error_count'= , "Deferred Error APIC interrupts") + text +=3D x86_show_irqstat(prec, "DFR", 'DEFERRED_ERROR', "Deferre= d Error APIC interrupts") =20 if constants.LX_CONFIG_X86_MCE: text +=3D x86_show_mce(prec, "&mce_exception_count", "MCE", "Machi= ne check exceptions") text +=3D x86_show_mce(prec, "&mce_poll_count", "MCP", "Machine ch= eck polls") =20 + if constants.LX_CONFIG_X86_HV_CALLBACK_VECTOR: + text +=3D x86_show_irqstat(prec, 'HYP', 'HYPERVISOR_CALLBACK', 'Hy= pervisor callback interrupts') + + if constants.LX_CONFIG_HYPERV: + text +=3D x86_show_irqstat(prec, 'HRE', 'HYPERV_REENLIGHTENMENT', = 'Hyper-V reenlightenment interrupts') + text +=3D x86_show_irqstat(prec, 'HVS', 'HYPERV_STIMER0', 'Hyper-V= stimer0 interrupts') + + if constants.LX_CONFIG_KVM: + text +=3D x86_show_irqstat(prec, "PIN", 'POSTED_INTR', 'Posted-int= errupt notification event') + text +=3D x86_show_irqstat(prec, "NPI", 'POSTED_INTR_NESTED', 'Nes= ted posted-interrupt event') + text +=3D x86_show_irqstat(prec, "PIW", 'POSTED_INTR_WAKEUP', 'Pos= ted-interrupt wakeup event') + + if constants.LX_CONFIG_GUEST_PERF_EVENTS: + text +=3D x86_show_irqstat(prec, "VPMI", 'PERF_GUEST_MEDIATED_PMI'= , 'Perf Guest Mediated PMI') + + if constants.LX_CONFIG_X86_POSTED_MSI: + text +=3D x86_show_irqstat(prec, "PIN", 'POSTED_MSI_NOTIFICATION',= 'Posted MSI notification event') + text +=3D show_irq_err_count(prec) =20 if constants.LX_CONFIG_X86_IO_APIC: @@ -151,11 +170,6 @@ irq_desc_type =3D utils.CachedType("struct if cnt is not None: text +=3D "%*s: %10u\n" % (prec, "MIS", cnt['counter']) =20 - if constants.LX_CONFIG_KVM: - text +=3D x86_show_irqstat(prec, "PIN", 'kvm_posted_intr_ipis', 'P= osted-interrupt notification event') - text +=3D x86_show_irqstat(prec, "NPI", 'kvm_posted_intr_nested_ip= is', 'Nested posted-interrupt event') - text +=3D x86_show_irqstat(prec, "PIW", 'kvm_posted_intr_wakeup_ip= is', 'Posted-interrupt wakeup event') - return text =20 def arm_common_show_interrupts(prec):