From: Thomas Gleixner <tglx@kernel.org>
To: Icenowy Zheng <zhengxingda@iscas.ac.cn>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Huacai Chen <chenhuacai@kernel.org>,
Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-mips@vger.kernel.org,
Icenowy Zheng <zhengxingda@iscas.ac.cn>
Subject: Re: [PATCH 3/8] irqchip/loongson-pch-lpc: extract non-ACPI-related code from ACPI init
Date: Sun, 01 Feb 2026 17:15:38 +0100 [thread overview]
Message-ID: <871pj4h239.ffs@tglx> (raw)
In-Reply-To: <20260131094547.455916-4-zhengxingda@iscas.ac.cn>
On Sat, Jan 31 2026 at 17:45, Icenowy Zheng wrote:
> A lot of code could be shared between the current ACPI init flow with
s/could/can/
> the possible OF init flow.
>
> Extract them to a dedicated function.
Extract it ..
> The re-ordering of parent IRQ acquisition requires the arch code to
of the parent interrupt acquisition ... the architecture code ...
> reserve legacy IRQs from dynirq allocation via
... legacy interrupts from the dynamic allocation by overriding
> overriding arch_dynirq_lower_bound(), otherwise the parent of LPC
of the LPC ... allocated at the ...
> irqchip will be allocated to the intended static range of LPC IRQs,
LPC interrupts
> which leads to allocation failure of LPC IRQs.
LPC interrupts
Please use proper sentences and words. This is not an acronym competition.
> +static int __init pch_lpc_init(phys_addr_t addr, unsigned long size,
> + struct fwnode_handle *irq_handle,
> + int parent_irq)
Avoid extensive line breaks. You have 100 characters
> +int __init pch_lpc_acpi_init(struct irq_domain *parent,
> + struct acpi_madt_lpc_pic *acpi_pchlpc)
Either avoid the line break or align the second line argument with the
first argument.
> +{
> + int parent_irq;
> + struct pch_lpc *priv;
> + struct irq_fwspec fwspec;
> + struct fwnode_handle *irq_handle;
> + int ret;
https://www.kernel.org/doc/html/latest/process/maintainer-tip.html#variable-declarations
Thanks,
tglx
next prev parent reply other threads:[~2026-02-01 16:15 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-31 9:45 [PATCH 0/8] Add support for LS7A LPC IRQ for MIPS Loongson systems Icenowy Zheng
2026-01-31 9:45 ` [PATCH 1/8] genirq: reserve NR_IRQS_LEGACY IRQs in dynirq by default Icenowy Zheng
2026-01-31 9:45 ` [PATCH 2/8] dt-bindings: interrupt-controller: add LS7A PCH LPC Icenowy Zheng
2026-02-09 23:48 ` Rob Herring
2026-02-10 6:33 ` Icenowy Zheng
2026-02-10 10:51 ` Icenowy Zheng
2026-02-10 12:47 ` Huacai Chen
2026-01-31 9:45 ` [PATCH 3/8] irqchip/loongson-pch-lpc: extract non-ACPI-related code from ACPI init Icenowy Zheng
2026-01-31 14:05 ` kernel test robot
2026-02-01 16:15 ` Thomas Gleixner [this message]
2026-01-31 9:45 ` [PATCH 4/8] irqchip/loongson-pch-lpc: guard ACPI init code with CONFIG_ACPI Icenowy Zheng
2026-01-31 9:45 ` [PATCH 5/8] irqchip/loongson-pch-lpc: add OF init code Icenowy Zheng
2026-01-31 19:59 ` kernel test robot
2026-02-01 2:33 ` Huacai Chen
2026-02-01 16:17 ` Thomas Gleixner
2026-02-01 16:19 ` Thomas Gleixner
2026-02-02 5:50 ` Icenowy Zheng
2026-02-02 9:55 ` Thomas Gleixner
2026-02-02 1:12 ` kernel test robot
2026-01-31 9:45 ` [PATCH 6/8] irqchip/loongson-pch-lpc: enable building on MIPS Loongson64 Icenowy Zheng
2026-01-31 9:45 ` [PATCH 7/8] MIPS: Loongson64: dts: sort nodes Icenowy Zheng
2026-01-31 9:45 ` [PATCH 8/8] MIPS: Loongson64: dts: add node for LS7A PCH LPC Icenowy Zheng
2026-02-01 9:57 ` [PATCH 0/8] Add support for LS7A LPC IRQ for MIPS Loongson systems Yao Zi
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